Method and apparatus for reducing power consumption in digital electronic circuits

Abstract

An integrated circuit with power conservation includes a number of functional blocks, each of which includes a digital circuitry and at least one output control line, and a power controller coupled to the control lines. The output control lines develop clock control signals based upon a functional block's knowledge of the direction of data flow. The power controller the reduces power by deactivating functional blocks that are not needed as indicated by the clock control signals. More specifically, a system with power conservation includes a number of functional blocks capable of processing data, each of the functional blocks including a modulated clock input and N+1 clock control lines which reflect the direction of data flow, where N is a number of neighbors of a particular functional block, and a clock controller having an input clock, the clock controller being coupled to the modulated clock inputs and the clock control lines of the functional blocks. The clock controller is operative to modulate the input clock in accordance with the signals on the clock control lines to provide modulated clocks to each of the plurality of functional blocks. A method for reducing power consumption includes the steps of: a) receiving control signals from a number of functional blocks; b) selectively deactivating a particular functional block upon a request from that functional block or from another functional block; and c) activating the particular functional block upon a request from another functional block.

Description

BACKGROUND OF THE INVENTIONThis invention relates generally to digital electronic equipment, and more particularly to methods and apparatus for reducing power consumption for personal computer systems.There are variety of reasons why computer designers wish to reduce power consumption in personal computers. Portable computers, for example, typically depend on batteries for power. Obviously, the less power consumed by the portable computer circuitry and peripherals, the longer the batteries will last. In addition to portable computer applications, it is also often desirable to have desktop computers that consume less power. This is because reduced power consumption reduces energy costs and, in a cumulative sense, reduces the negative environmental impacts of excessive energy consumption. Furthermore, desktop computers designed to consume less power also generate less heat, which means that they can be made smaller and with reduced cooling requirements.The prior art has taken several ...

AI Technical Summary

Benefits of technology

The present invention provides a method and apparatus for reducing power consumption in digital electronic circuits and, more particularly, in personal computer systems. Advantageously, the operation of the present invention is transparent to the computer system and to software running on the computer system.

An integrated circuit with power conservation in accordance with the present invention includes a number of functional blocks, each of which has digital circuitry and at least one output control line. The integrated circuit also includes a power controller coupled to the output control line of each of the functional blocks. During operation, the power controller reduces power consumed by selected functional blocks in response to control signals on the control lines. In essence, each functional block within the integrated circuit generates a signal indicating whether that functional block is busy and / or if a "neighboring" functional block will be required. These functional blocks can be arbitrarily small and are not limited to the fairly large functional system block (FSB.TM.) circuitry of some previous power management techniques. FSB.TM. is a trademark of VLSI Technology, Inc. of San Jose, Calif. If a given functional block is not busy, it can be deactivated (by stopping its clock, disabling its power rails, etc.). The activation or deactivation of the functional blocks is controlled by the flow of data within the integrated circuit, allowing the integrated circuit to minimize power without any explicit intervention from software or hardware timers. Because the data flow controls the clocking, the present invention is particularly effective with such devices as PCI bus devices, or ISA / EISA bus slave devices.

A method for reducing power consumption in a digital electronic circuit includes the steps of: a) receiving a control signal from a number of functional blocks; b) deactivating a particular functional block upon a request from that particular functional block or from another functional block, and in the absence of a request from another functional block requesting the activation of that particular functional block; and c) activating a functional block upon a request of another functional block. Each functional block consumes less power when deactivated than when activated. Preferably, the functional blocks are activated by providing a full-speed clock to the functional block, and are deactivated by not applying the clock to the block. This can be accomplished with a "modulated clock" which is derived from a regular output clock as modulated by signals provided by the clock control lines.

invention, by breaking the chip into number of clock regions or functional blocks, minimizes the problem of skew. This allows each functional block to be individually shut-down based upon usage and yet maintains a minimal clock skew within the clock regions. This allows critical data paths and state machines to run in full speed without skew problems. Since the number of functional regions are under the control of the chip designer, the clock driver and distribution for each functional block can be designed to minimize skew between the various blocks.

Problems solved by technology

For example, if peripherals are turned off to reduce power consumption, they are not immediately available when they are needed.

This causes the time-costly procedure of powering up the required peripheral and waiting for it to become fully operational prior to continuing the desired operation that used that peripheral.

By implementing the method in software, valuable computational time is lost to the power consumption reduction function.

In either case, expensive, additional circuitry separate from the computer logic is required.

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