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Multibit single cell memory element having tapered contact

a memory element and multi-cell technology, applied in the field of memory element having a tapered contact layer, can solve the problems of increased reduced performance, and increased cost, and achieve the effect of reducing the complexity of the computer's architectur

Inactive Publication Date: 2001-07-03
OVONYX MEMORY TECH LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

There is disclosed herein an electrically operated, directly overwritable, multibit, single-cell memory element comprising a volume of memory material defining a single cell memory element, the memory material characterized by (1) a large dynamic range of electrical resistance values, and (2) the ability for at least a filamentary portion of the memory material to be set to one of a plurality of resistance values within the dynamic range in response to selected electrical input signals so as to provide the single-cell memory element with multibit storage capabilities. At least a filamentary portion of the single cell memory element being setable, by the selecte...

Problems solved by technology

This information is transferred, as needed, to faster and more expensive, but still non-volatile, hard disk memories.
Very fast computers even transfer forth and back small portions of the information stored in DRAM to even faster and even more expensive volatile static RAM (SRAM) devices so that the microprocessor will not be slowed down by the time required to fetch data from the relatively slower DRAM.
Transfer of information among the tiers of the memory hierarchy occupies some of the computer's power and this need for "overhead" reduces performance and results in additional complexity in the computer's architecture.
The electrically erasable phase change memories described in the Ovshinsky patents, as well as subsequent electrical solid state memory, had a number of limitations that prevented their widespread use as a direct and universal replacement for present computer memory applications, such as tape, floppy disks, magnetic or optical hard disk drives, solid state disk flash, DRAM, SRAM, and socket flash memory.
Specifically, the following represent the most significant of these limitations: (i) a relatively slow (by present standards) electrical switching speed, particularly when switched in the direction of greater local order (in the direction of increasing crystallization); (ii) a relatively high input energy requirement necessary to initiate a detectable change in local order; and (iii) a relatively high cost per megabyte of stored information (particularly in comparison to present hard disk drive media).
The most significant of these limitations is the relatively high energy input required to obtain detectable changes in the chemical and / or electronic bonding configurations of the chalcogenide material in order to initiate a detectable change in local order.
Such high energy levels translate into high current carrying requirements for the address lines and for the cell isolation / address device associated with each discrete memory element.
Taking into consideration these energy requirements, the choices of memory cell isolation elements for one skilled in the art would be limited to very large single crystal diode or transistor isolation devices, which would make the use of micron scale lithography and hence a high packing density of memory elements impossible.
Thus, the low bit densities of matrix arrays made from this material would result in a high cost per megabyte of stored information.
The solid state, electronic memories presently in use are relatively expensive to manufacture, the cost being typically about eighty times the cost per bit of storage capacity in relation to magnetic disk storage.
However, in spite of such advantages, the higher cost of solid state electrically erasable memories have prevented them from enjoying a substantial share of the market now dominated by magnetic memory systems.
Although solid state electronically erasable memories could potentially be manufactured at reduced cost, the overall price-to-performance ratio of these devices is inadequate for them to fully replace magnetic disk systems.
The most significant electrical switching difference resides in the inability of the MSM memory switches to be directly overwritten.
But most importantly, it is impossible for Rose, et al and Hajto, et al to directly overwrite information stored in the cells of their memory material.
In addition, the prior art has no analog to the direct overwrite, wide dynamic range and multibit storage capabilities of the instant memory elements.
If a set resistance value is lost or even found to significantly drift over time, the information stored therein is destroyed, users lose confidence in the archival capabilities of the memory and the technology loses all credibility.
However, if the EEPROM replacement for mechanical hard drives has high switching energy requirements (and therefore high power requirements), the power savings may be inconsequential or as best unsubstantial.
Today's computers, especially personal computers, are routinely subjected to high temperatures.
Without this thermal stability data loss may occur leading to the aforementioned loss of credibility.
If the cycle life of a memory device is too short, the consumer will be adverse to using this device for fear of losing valuable data.
If the EEPROMs used to replace the computer's main and display memory do not have a relatively long write / erase cycle life, these memories would need to be replaced excessively.
This would lead to excessive costs to the consumer and therefore loss of consumer confidence.

Method used

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  • Multibit single cell memory element having tapered contact
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  • Multibit single cell memory element having tapered contact

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Embodiment Construction

Erasable electrical memories fabricated from the broad class of chalcogenide materials have employed structural changes that were accommodated by movement of certain atomic species within the material to permit change of phase as the material switched from the amorphous state to the crystalline state. For example, in the case of electrically switchable chalcogenide alloys formed of tellurium and germanium, such as those comprising about 80% to 85% tellurium and about 15% germanium along with certain other elements in small quantities of about one to two percent each, such as sulfur and arsenic, the more ordered or crystalline state was typically characterized by the formation of a highly electrically conductive crystalline. Te filament within the switchable pore of the memory material. A typical composition of such a prior art material would be, for example, Te.sub.81 Ge.sub.15 S.sub.2 As.sub.2 or Te.sub.81 Ge.sub.15 S.sub.2 Sb.sub.2. Because Te is so highly conductive in its crysta...

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Abstract

An electrically operated, directly overwritable, multibit, single-cell chalcogenide memory element with multibit storage capabilities and having at least one contact for supplying electrical input signals to set the memory element to a selected resistance value, the second contact tapering to a peak adjacent to the memory element. In this manner the tapered contact helps define the size and position of a conduction path through the memory element.

Description

FIELD OF THE INVENTIONThe present invention relates generally to a uniquely designed solid state, electrically and optically operated, directly overwritable, low energy, very fast switching, non-volatile, analogue and multilevel single-cell operating memory element, and to high density electrical memory arrays fabricated from these elements. More specifically, the present invention relates to a memory element having a tapered contact layer.BACKGROUND AND PRIOR ARTThe Ovonic EEPROM is a novel, proprietary, high performance, non-volatile, thin-film electronic memory device. Its advantages include non-volatile storage of data, potential for high bit density and, consequently, low cost because of its small footprint and simple two-terminal device configuration, long reprogramming cycle life, low programming energies and high speed. The Ovonic EEPROM is capable of both analog and digital forms of information storage. Digital storage can be either binary (one bit per memory cell) or multi...

Claims

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Application Information

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IPC IPC(8): G11C11/56H01L45/00G11C16/02H10B99/00G11C11/00H01L27/10
CPCG11C11/56G11C11/5678G11C13/0004G11C13/0069G11C2013/008G11C2213/52H10N70/231H10N70/826H10N70/8418H10N70/8828H10N70/026G11C11/00
Inventor OVSHINSKY, STANFORD R.
Owner OVONYX MEMORY TECH LLC
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