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Standard cell back bias architecture

A standard component and reverse bias technology, applied in the field of CMOS components, can solve problems such as component performance deterioration, achieve the effects of improving speed performance, increasing leakage current, and improving performance

Active Publication Date: 2007-12-05
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Standby leakage power occurs when FETs or other components are not activated, and it can also cause component performance degradation

Method used

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Embodiment Construction

[0041] FIG. 1 is a partial block diagram of a system 100 of the present invention illustrating two components that may be used to create a power saving IC unit structure. System 100 , or at least the depicted portion thereof, includes an electronic integrated circuit design assembly 102 and a leakage power control integrated circuit architecture 104 . The system 100 may also include a plurality of component structures for implementing a power-saving integrated circuit.

[0042]The electronic integrated circuit design assembly 102 includes a plurality of sub-software design tools that can be connected to different databases, such as a semiconductor foundry's database or a foundry's customer's database. In general, electronic integrated circuit design assembly 102 may include a plurality of component libraries accessible through a user interface. In this way, the cells of each component library can be placed in the same IC design layout. The electronic IC design assembly 102 c...

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Abstract

An apparatus including, in one embodiment, a CMOS device cell including at least first and second CMOS transistors having first and second CMOS transistor doped regions in first and second doped wells, respectively, wherein each of the first and second CMOS transistor doped regions is configured to be biased with a corresponding one of a power supply potential and a ground potential. Such an embodiment also includes a tap cell having first and second tap cell doped regions in the first and second doped wells, respectively, wherein each of the first and second tap cell doped regions is configured to be biased with a different potential relative to the power supply and ground potential.

Description

technical field [0001] The invention relates to a CMOS element, in particular to a CMOS element capable of applying bias voltage to the transistor doping region. Background technique [0002] The complexity of the process steps, the circuit density of the components and the minimum size of the components make the design and manufacturing of advanced complex semiconductor components increasingly mature. Therefore, in the design of advanced complex semiconductor components, many factors must be considered, including power consumption, speed performance, leakage power consumption, etc. Accordingly, layout, electrical simulation, and many other related steps are integrated into a mature electronic component design system. This type of electronic design system enables integrated circuit designers to generate complex structures in a computer virtual environment, build complex three-dimensional cells (cells) and perform electrical simulations, and can also match process capabiliti...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/092H01L21/82H01L21/8238H01L27/118H01L29/739
CPCH01L27/11807
Inventor 萧庆和吴志宏阙国勋
Owner TAIWAN SEMICON MFG CO LTD