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Semiconductor device with recess grid and its manufacturing method

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problem that the length of the recessed channel varies greatly, it is difficult to control the thickness of thick oxides, and it is difficult to ensure the performance of semiconductor devices, etc. question

Active Publication Date: 2009-02-04
NAN YA TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, in the process of the above-mentioned semiconductor device, the trench must be filled with a thick oxide with a predetermined thickness. Because it is difficult to control the thickness of the deposited thick oxide, the length of the recessed channel varies greatly, and it is difficult to ensure the reliability of the semiconductor device. performance

Method used

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  • Semiconductor device with recess grid and its manufacturing method
  • Semiconductor device with recess grid and its manufacturing method
  • Semiconductor device with recess grid and its manufacturing method

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Embodiment Construction

[0030] 1 to 8 are process cross-sectional views of a semiconductor device with a trench gate according to a first embodiment of the present invention. Please refer to FIG. 1, first, a semiconductor substrate 100 is provided, which may include silicon, gallium arsenide, gallium nitride, strained silicon, silicon arsenide, silicon carbide, carbide, diamond, an epitaxial layer and / or other materials , preferably a silicon substrate. The surface of the semiconductor substrate 100 includes a hard mask layer made of insulating materials such as silicon dioxide, silicon nitride, oxynitride silicide, etc., and then, a photolithography (photolithography) is used to form an opening 106 on the surface of the hard mask layer. The photoresist pattern 104, the opening 106 is relative to the position where the trench for the gate is to be formed. Then, using the photoresist pattern 104 as an etching mask, the hard mask layer is etched through the opening 106 to form a trench etching mask 10...

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Abstract

This invention provides a manufacturing method for a semiconductor device with a groove-like grid, which first of all provides a semiconductor base with a groove etched mask on the surface, then takes the mask as a veil to etch the base to form a groove, then dopes a doping agent on the base via the groove to form a doped region, etches the base on the bottom of the groove to form an extension part then to form a grid insulation layer on the groove and its extension part and a groove-like grid in them.

Description

technical field [0001] The present invention relates to a semiconductor manufacturing technology, in particular to a method for manufacturing a metal oxide semiconductor transistor (MOS transistor) with a trenched gate. Background technique [0002] The manufacturing technology of semiconductor devices, such as metal-oxide-semiconductor transistors, continues to develop toward high performance, high integration, and high operating speed. With the improvement of integration, the area occupied by metal oxide semiconductor transistors on the semiconductor substrate must be reduced. For example, by reducing the gate length and source / drain regions on the surface of the semiconductor substrate, the purpose of increasing the integration can be achieved. However, the above-mentioned This method may lead to short channel effect, which seriously affects the performance of the semiconductor device. US Patent No. 6,150,693 discloses a metal oxide semiconductor transistor with a V-shap...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L29/78
Inventor 林瑄智程谦礼李中元林正平李培瑛
Owner NAN YA TECH