Three-dimensional multiprocessor system chip
A multi-processor system and processor technology, applied in the direction of electrical digital data processing, instruments, semiconductor devices, etc., can solve the problems of increased chip area consumption, intensified bus resource competition, complex network protocols, etc., to reduce signal delay time, The effect of shortening the length of the interconnection line and improving the product yield
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[0033] The embodiment of the present invention is shown in Figure 1-2, it is formed by stacking two VLSI chip wafers 6, 16 processor cores and 5 three-dimensional on-chip networks are integrated on the VLSI chip wafer 6 Router 5, the processors are connected through the three-dimensional network-on-chip router 5, the three-dimensional network-on-chip router 5 between each layer of wafers 6 is connected by a data channel in the vertical direction, and the three-dimensional network-on-chip router 5 is used to communicate between the 6 layers of wafers Parallel, bi-directional data transfer.
[0034]Described three-dimensional on-chip network router 5 is made up of first-in-first-out wave shift buffer memory (FIFO), synchronous matrix switch array, and digital routing decision-making module 8 and parallel network interface; Parallel network interface input port and synchronous matrix switch The arrays are connected; the output interface of the synchronous matrix switch array on o...
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