A preparation method of nanometer scale W/TiN compound refractory metal bar

A refractory metal, nano-scale technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as high threshold voltage, and achieve the effect of overcoming excessive threshold voltage
CN101217112AInactive Publication Date: 2008-07-09INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Patent Information

Authority / Receiving Office
CN Β· China
Current Assignee / Owner
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
Publication Date
2008-07-09
Estimated Expiration
Not applicable Β· inactive patent

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Abstract

The invention relates to a preparation method of a nanometer scale W / TiN composite refractory metal gate, the steps are as follows: a device source / leakage area cobalt silicide is formed, after that, the flattening process is carried out, a gate groove is corroded, a gate silicon oxide is bleached and replaced, then the gate is oxidized again; the vacuum thermal annealing processing is carried out; a refractory metal TiN is sputtered, the thickness is 25 to 45nm; a W thin film is sputtered, the thickness is 90 to 110nm; the acetone and the anhydrous ethanol are used for ultrasonic cleaning, the deionized water is used for flushing, and the drying is carried out in hot N2; the W / TiN T-shaped gate is done with the lithography; the W / TiN T-shaped gate is etched by reaction ions, the etching gas is C12 and SF6; a chemical vapor deposition SiO2 is strengthened by a plasma, the thickness of SiO2 is 500 to 700nm; a contact hole is formed; and the metallizing annealing is carried out. The invention solves a series of serious problems of excessive high gate resistance, serious boron penetration of a PMOS device, polysilicon gate depletion, incompatibility with a high k gate dielectric and so on which exist in the conventional polysilicon gate, so the invention can obtain excellent device properties.
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Description

technical field

[0001] The invention belongs to the technical field of nano-scale CMOS devices and semiconductor integration, and in particular relates to a preparation method for W / TiN composite refractory metal gates used in the manufacture of nano-scale CMOS devices. Background technique

[0002] When the gate length of polysilicon gate MOSFET"s shrinks to the nanometer scale, conventional polysilicon gates are thermally stable due to excessive gate resistance, severe boron penetration effect of PMOS devices, polysilicon gate depletion effect, and incompatibility with high-K gate dielectrics. The performance is not good, there are a series of serious problems such as the Fermi pinning effect, which has become a bottleneck for further improving the performance of CMOS devices. Using refractory metals instead of traditional doped polysilicon as the gate electrode of MOSFET's can satisfactorily solve the above problems, and there is hope Applied for the next generation of in...

Claims

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