Silicon-germanium heterojunction bipolar transistor and manufacturing method thereof

Abstract

The invention discloses a silicon-germanium heterojunction bipolar transistor comprising a T-shaped emitting electrode, side walls are arranged at both sides of the T-shaped emitting electrode; the T-shaped emitting electrode and the integral side walls have the maximum thicknesses of a and the minimum thicknesses of b; the difference value of a and b is c, and c is less than or equal to 5 percent of b, or c is less than or equal to 500 Angstrom. The invention also discloses a manufacturing method of the silicon-germanium heterojunction bipolar transistor. The silicon-germanium HBT (Heterojunction Bipolar Transistor) and the manufacturing method thereof can obtain the emitting electrode with uniform thinness, in particular the emitting electrode with a flat upper surface; and in addition, the invention has low requirements for the fidelity of an emitting electrode window, simple manufacturing process and high compatibility and is compatible to a metal gate manufacturing process of the traditional CMOS (Complementary Metal-Oxide-Semiconductor Transistor) process.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit device, in particular to a silicon-germanium heterojunction bipolar transistor. Background technique [0002] A heterojunction bipolar transistor (HBT) consists of a wide bandgap emitter, a heavily doped base with a smaller bandgap, and a wide bandgap collector. For example, the emitter is made of silicon and the base is made of silicon. A silicon-germanium HBT composed of a germanium alloy (usually abbreviated as silicon-germanium) and a collector region made of silicon. The base band gap of silicon-germanium HBT is smaller than that of the emitter region, and it is fully compatible with silicon integrated circuit technology. It is suitable for manufacturing semiconductor devices with high integration, high speed, and high compatibility with silicon semiconductor manufacturing technology. It is widely used in high frequency field of high-speed communications. [0003] Please refer to FIG. 1...

AI Technical Summary

Problems solved by technology

The changes of these two have a great influence on the amplification factor and cut-off frequency of the final silicon-germanium HBT, which makes it difficult to improve the overall yield of the silicon-germanium HBT actually produced. Sometimes it can only be achieved by lowering the technical indicators in disguise. high yield

[0017] Second, in the above method, in order to improve the yield rate of silicon-germanium HBT, the fidelity of the emitter window 109a is highly required, because the shape and size of the recess and the emitter window formed after the final deposition of the emitter It is closely related, and it is necessary to maintain very high requirements for shape and size control to ensure that the change in the effective thickness of the emitter due to different sags is within the allowable range. For the HBT process of 0.35μm, amplification factor 100, and cut-off frequency 10-40GHZ, Only a 3% difference in critical dimensions or a 0.5% change in the rectangular aspect ratio of the emitter window can cause the cut-off frequency, operating voltage, amplification factor, etc. to exceed the standard, resulting in a significant reduction in yield. %~10% or so

However, due to the poor heat resistance of high-k metal materials, it must be formed after all major ion implantation processes, so it cannot be formed by the traditional method of depositing first, then etching, and then implanting

At the same time, the etching process of high-k metal materials is difficult, and the etching equipment and gases are relatively special, and the cost is very high

[0019] Therefore, the current high-k metal gate process often adopts the gate final formation process, first using the Damascene process or the pseudo-gate process to form the gate space, and then perform implantation, then fill the high-k metal material, and then use chemical mechanical polishing or The anti-etching process is used for planarization, so the traditional silicon-germanium HBT structure and manufacturing method are difficult to be compatible with the CMOS process using high-K metals, and the process complexity is very high

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