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Real-time image segmentation processing system and high-speed intelligent unified bus interface method based on Institute of Electrical and Electronic Engineers (IEEE) 1394 interface

A real-time image and segmentation processing technology, applied in image data processing, time division multiplexing systems, image analysis, etc., can solve problems such as low processing speed, and achieve the effect of improving forwarding speed, reliable conversion, and increasing reliability.

Inactive Publication Date: 2011-07-06
NORTHWESTERN POLYTECHNICAL UNIV
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Problems solved by technology

[0005] In order to overcome the deficiency that the existing image processing system performs real-time segmentation processing on the high-speed IEEE1394 camera image data stream, the present invention provides a real-time image segmentation processing system with an IEEE1394 interface and an interface method for a high-speed intelligent unified bus. By designing the IEEE1394 control The device implements the analysis of the high-speed camera IEEE1394 bus protocol, receives effective image data according to the image frame synchronization signal, builds a parallel image processing hardware structure inside the FPGA, uses Sobe1 edge detection, threshold segmentation and morphological erosion processing to realize real-time high-speed image data flow Segmentation processing, the processed result image is transmitted through high-speed transceiver SerDes using fiber channel to achieve high-speed forwarding; through the multi-level hardware pipeline design to realize the acceleration of system image processing; through the clock control module to realize the synchronous clock of IEEE1394 bus and high-speed intelligent bus synchronous clock Switching to realize high-speed and reliable transmission of two bus image data

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  • Real-time image segmentation processing system and high-speed intelligent unified bus interface method based on Institute of Electrical and Electronic Engineers (IEEE) 1394 interface
  • Real-time image segmentation processing system and high-speed intelligent unified bus interface method based on Institute of Electrical and Electronic Engineers (IEEE) 1394 interface
  • Real-time image segmentation processing system and high-speed intelligent unified bus interface method based on Institute of Electrical and Electronic Engineers (IEEE) 1394 interface

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Embodiment Construction

[0021] refer to Figure 1-8 , to describe the present invention in detail.

[0022] This embodiment is an interface between a real-time high-speed image segmentation processing system based on an IEEE1394 interface camera and an intelligent bus, and realizes real-time segmentation of an IEEE1394 camera image sequence and its interface with a high-speed intelligent bus. The hardware structure of this embodiment includes an IEEE1394 image receiving controller, an intelligent bus data frame encapsulation and sending controller, a real-time image processing module and a different bus clock switching module.

[0023] In this embodiment, the scheduling and interface control of the two buses are mainly completed in the FPGA, and the FPGA adopts the American ALTERA Cyclone II 2C35 FPGA chip. The link layer and physical layer in the IEEE1394 bus protocol are realized by the link layer control chip PDI1394L40 and the physical layer chip PDI1394L25 of PHILIPS; the high-speed transceiver...

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Abstract

The invention discloses a real-time image segmentation processing system and a high-speed intelligent unified bus interface method based on an Institute of Electrical and Electronic Engineers (IEEE) 1394 interface, which are used for solving the technical problem that the speed of the real-time segmentation processing which is carried out on camera image data streams of an IEEE 1394 camera by using an existing image processing system is low. The technical scheme is as follows: an IEEE 1394 controller is designed to analyze the IEEE 1394 bus protocol of the high-speed camera; effective image data are received in accordance with image frame synchronizing signals; a parallel image processing hardware structure is built in an field programmable gate array (FPGA); Sobel edge detection, threshold segmentation and morphology corrosion processing are adopted to realize the real-time segmentation processing on the high-speed image data streams; the processed result images are forwarded at a high speed by using a high-speed receiver SerDes through fiber channels; a multilevel hardware pipeline design is used to quicken to process system images; and a clock control module is used for realizing the switch between an IEEE 1394 bus synchronous clock and a high-speed intelligent bus synchronous clock, thus realizing high-speed and reliable transmission for image data of the two types of buses.

Description

technical field [0001] The invention relates to a bus interface method, in particular to an IEEE1394 interface real-time image segmentation processing system and a high-speed intelligent unified bus interface method. Background technique [0002] When developing a high-speed real-time image processing system, the performance of the front-end image acquisition unit has a great impact on the performance of the entire system. At present, most of the image acquisition units are PAL / NTSC interface output, and the output image frame rate is low, so it is suitable for some occasions that require real-time image processing - such as image-based missile terminal guidance and image-based high-speed target tracking system development , the performance and processing speed of the image acquisition and processing unit become the bottleneck of the system to further improve the accuracy and practicability. [0003] IEEE1394 is a high-speed serial bus standard, the standard cable mode supp...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/40G06T7/00H04J3/06
Inventor 史忠科王闯贺莹
Owner NORTHWESTERN POLYTECHNICAL UNIV
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