Solar cell and preparation method thereof

A technology of solar cells and sheet resistance, applied in circuits, photovoltaic power generation, electrical components, etc., can solve the problems of inability to accurately control the concentration of doping ions, low conversion efficiency of solar cells, complicated process steps, etc., and improve the conversion efficiency of solar energy. , The effect of improving the utilization rate and improving the conversion efficiency

Active Publication Date: 2012-06-06
KINGSTONE SEMICONDUCTOR LIMITED COMPANY
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  • Claims
  • Application Information

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Problems solved by technology

[0012] The technical problem to be solved by the present invention is to overcome the defects of low conversion efficiency of solar cells in the prior art, the inability to accurately control the concentration of dopant ions in the thermal diffusion process, complex process steps, and high cost, and to

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  • Solar cell and preparation method thereof
  • Solar cell and preparation method thereof
  • Solar cell and preparation method thereof

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Example Embodiment

[0046] reference Figure 1-Figure 8 , The method for preparing the solar cell of the present invention is introduced in detail, which includes the following steps:

[0047] reference figure 1 , Step S 1 The P+ type doped layer 2 is formed on the backside of the wafer of the P type substrate 1. Those skilled in the art can select a suitable doping layer formation process according to actual needs, such as accelerating P type ions and forming the P+ type by ion implantation. In the doped layer 2, the P-type ions are accelerated to 500eV-50keV, and the sheet resistance of the formed P+-type doped layer is 20-60Ω / □. Those skilled in the art can select appropriate doping ions and the concentration and energy of doping ions according to actual needs to obtain ideal sheet resistance. For example, P-type ions are accelerated to 1keV-40keV, preferably, P-type ions are accelerated to 5keV-30keV; the sheet resistance of the formed P+ type doped layer is 25-55Ω / □, preferably, the formed P+ ...

Example Embodiment

[0064] Example 1

[0065] reference figure 1 , Step S 1 , The P+ type doped layer 2 is formed on the backside of the wafer of the P type substrate 1. In this embodiment, the P type ions are accelerated and the P+ type doped layer 2 is formed by ion implantation, wherein the boron ions are accelerated to 500 eV to form The sheet resistance of the P+ type doped layer is 20Ω / □. Since the ion implantation method is used to form the P+ type doped layer, an annealing step is required, figure 1 The arrow in the middle shows the direction of ion implantation, which is only for ease of understanding and should not be interpreted as a limitation of the present invention. After the ion implantation is completed, annealing is performed to activate the doped impurities.

[0066] reference Figure 2-3 , Step S 2 , An N-type doped layer 3 is formed on the wafer surface of the P-type substrate 1, wherein the N-type doped layer 3 is formed by a thermal diffusion method, and the sheet resistance ...

Example Embodiment

[0071] Example 2

[0072] reference figure 1 , Step S 1 , The P+ type doped layer 2 is formed on the backside of the wafer of the P type substrate 1. In this embodiment, the P type ions are accelerated and the P+ type doped layer 2 is formed by ion implantation, in which the boron ions are accelerated to 50 keV. The sheet resistance of the P+ type doped layer is 60Ω / □. Since the ion implantation method is used to form the P+ type doped layer, an annealing step is required, figure 1 The arrow in the middle shows the direction of ion implantation, which is only for ease of understanding and should not be interpreted as a limitation of the present invention. After the ion implantation is completed, annealing is performed to activate the doped impurities.

[0073] reference Figure 2-3 , Step S 2 An N-type doped layer 3 is formed on the wafer surface of the P-type substrate 1, wherein the N-type doped layer 3 is formed by a thermal diffusion method. The sheet resistance of the N-typ...

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Abstract

The invention discloses a preparation method of a solar cell. The method comprises the following steps of: S1. forming a P+ type doped layer on the back of a wafer of a P type substrate by ion implantation; S2. forming an N type doped layer on the surface of the wafer of the P type substrate; S3. forming N+ heavily doped regions in the N type doped layer; S4. forming a coating on the surface of the wafer of the P type substrate, wherein the coating comprises a passivation layer and an anti-reflection film; S5. manufacturing surface electrodes and back electrodes on the surface and back of the wafer of the P type substrate, wherein the surface electrodes are manufactured in the regions corresponding to the N+ heavily doped regions on the N type doped layer; and S6. sintering the wafer of the P type substrate at a temperature of 700-1100 DEG C to combine the metallic elements in the surface and back electrodes with the wafer in a eutectic manner. The invention also discloses a solar cell. The solar cell and the preparation method have the following effect: the photoelectric conversion efficiency of the solar cell is improved due to the back surface field effect and the structure of a selective emitter.

Description

technical field [0001] The invention relates to a solar cell and a preparation method thereof, in particular to a solar cell with a P-type substrate and a selective emitter and a preparation method thereof. Background technique [0002] New energy is one of the five most decisive technological fields in the world economic development in the 21st century. Solar energy is a clean, efficient and inexhaustible new energy source. In the new century, the governments of various countries regard the utilization of solar energy resources as an important content of the national sustainable development strategy. Photovoltaic power generation has the advantages of safety, reliability, no noise, no pollution, less constraints, low failure rate, and easy maintenance. In recent years, with the rapid development of the photovoltaic power generation industry in the world, the supply of solar chips is in short supply, so improving the photoelectric conversion efficiency of solar chips and t...

Claims

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Application Information

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IPC IPC(8): H01L31/18H01L31/042H01L31/0352H01L31/0224H01L31/068
CPCY02E10/52Y02E10/547Y02P70/50
Inventor 陈炯
Owner KINGSTONE SEMICONDUCTOR LIMITED COMPANY
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