Formation method of cmos gate oxide layer

Abstract

The invention relates to a method for forming a CMOS gate oxide layer, comprising: providing a substrate, the substrate including NMOS regions and PMOS regions juxtaposed, forming an oxide layer on the substrate as a barrier layer for subsequent ion implantation; photolithography Form the first window of the NMOS region; perform ion implantation to form a P well in the substrate of the NMOS region, etch and remove the oxide layer in the first window; deposit the first layer on the substrate of the NMOS region and the oxide layer of the PMOS region The gate oxide layer is annealed with fluorine gas; the second window of the PMOS region is formed by photolithography; ion implantation is performed to form an N well in the substrate of the PMOS region, and the first gate oxide layer and the oxide layer in the second window are etched and removed; A second gate oxide layer is deposited on the surface of the structure. In the present invention, the gate oxide of NMOS is annealed with fluorine gas, which reduces the interface defect density between the substrate and gate oxide, improves the transconductance, and improves its performance; while the gate oxide of PMOS does not affect its performance without fluorine gas annealing.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for forming a CMOS gate oxide layer. Background technique [0002] The formation of the CMOS gate oxide layer in the prior art includes the following steps: [0003] In step 101, if Figure 2a As shown, a substrate 200 is provided, the substrate 200 includes NMOS region I and PMOS region II juxtaposed, an oxide layer 201 is formed on the substrate 200, and the oxide layer serves as a barrier layer for subsequent ion implantation; [0004] In step 102, if Figure 2b As shown, a first photoresist 202 is applied, such as Figure 2c As shown, photolithography of the first photoresist 202 forms the first window 202a of the NMOS region 1; [0005] In step 103, if Figure 2d As shown, ion implantation is performed in the first window 202a, and a P well region 203 is formed in the substrate 200 of the NMOS region I, as Figure 2e As shown, the oxide layer 201 in the first wind...

AI Technical Summary

Problems solved by technology

[0009] The study found that annealing with fluorine gas after forming the gate oxide layer can better repair the dangling bonds at the interface between the substrate and the CMOS gate oxide layer, reduce the interface defect density, and improve the transconductance. At the same time, for NMOS, it can weaken the hot carriers. Injection effect and positive bias temperature coupling effect, but for PMOS, when ion implantation forms PMOS source and drain regions, the implantation source is generally boron fluoride. Due to the existence of fluorine ions in the PMOS gate oxide layer, boron in the source and drain regions will be caused. Ions are more likely to penetrate the gate oxide layer to reach the interface between the substrate and the CMOS gate oxide layer, affecting the threshold voltage of PMOS, thus causing the instability of the threshold voltage of PMOS

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