Vertical parasitic pnp triode in germanium silicon hbt process and fabrication method thereof
A PNP triode, vertical parasitic technology, used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of low emission coefficient of PNP triode, inability to penetrate the germanium-silicon alloy carbon layer, and insufficient cut-off frequency, and achieve improvement. Parasitic effect, area saving, effect of improving current gain factor and frequency characteristics
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[0043] Such as figure 1 Shown is a schematic structural diagram of a vertical parasitic PNP transistor in the silicon germanium HBT process of the embodiment of the present invention. In the silicon germanium HBT process of the embodiment of the present invention, the vertical parasitic PNP transistor is formed on the P-type silicon substrate 1, and an N-type deep well 2 is formed on the P-type silicon substrate 1, and the active region is composed of a shallow groove field oxygen 3 isolation is shallow trench isolation (STI), including:
[0044] A collector region 7 is composed of a P-type ion implantation region formed in the active region, and the depth of the collector region 7 is greater than or equal to the depth of the bottom of the shallow trench field oxygen 3 . The P-type ion implantation in the collector region adopts the CMOSP well implantation process in the SiGe HBT process.
[0045] A pseudo-buried layer 6, composed of P-type ion implantation regions formed at...
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