Method for manufacturing transient voltage suppressor by aid of ultra-deep trench structures

A transient voltage suppression, deep trench technology, used in semiconductor/solid state device manufacturing, circuits, electrical components, etc., can solve problems such as the inability to meet the increasing requirements of size and energy-saving efficiency

Inactive Publication Date: 2013-09-11
江苏应能微电子股份有限公司
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

This makes traditional planar TVS and trench TVS devices unable to meet the increasing size and power efficiency requirements of high-end mobile phones or other portable electronic products in today's market

Method used

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  • Method for manufacturing transient voltage suppressor by aid of ultra-deep trench structures
  • Method for manufacturing transient voltage suppressor by aid of ultra-deep trench structures
  • Method for manufacturing transient voltage suppressor by aid of ultra-deep trench structures

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Embodiment Construction

[0052] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to define the protection scope of the present invention more clearly.

[0053] Our invention is a process method of using an ultra-deep trench (greater than 10 μm) structure to manufacture small-sized, ultra-low leakage current TVS diodes. Its process includes:

[0054] Step A: grow a layer of 5-15 μm heavily doped N-type epitaxial layer (Epitaxial Layer) 42 on the heavily doped P-type silicon substrate 41 ( image 3 ).

[0055] Step B: growing a layer of 10-30 μm near intrinsic lightly doped N-type epitaxial layer 43 on the heavily doped N-type epitaxial layer 42 ( Figure 4 ).

[0056] Step C: P-type region ion implantation.

[0057] Wherein, step C includes the following sub-steps:

[0058] Step C1: using a ph...

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Abstract

The invention discloses a method for manufacturing a transient voltage suppressor by the aid of ultra-deep trench structures. The method includes steps of A, growing a heavily doped N-type epitaxial layer on a heavily doped P-type silicon substrate; B, growing a nearly intrinsic lightly doped N-type epitaxial layer on the heavily doped N-type epitaxial layer; C, forming P-type doped region windows by a photoresist mask and implanting P-type doping ions; D, etching a series of ultra-deep isolation trenches, and enabling the ultra-deep isolation trenches to penetrate the two N-type epitaxial layers and reach the P-type silicon substrate; E, filling the ultra-deep isolation trenches formed in the step D with a silicon dioxide film; F, etching a series of closely arranged ultra-deep TVS (transient voltage suppressor) trenches and enabling the ultra-deep TVS trenches to penetrate the two N-type epitaxial layers and reach the P-type silicon substrate; G, filling the ultra-deep TVS trenches with a doped N-type polycrystalline silicon thin film; H, growing inter-layer dielectrics; I, etching contacts; J, performing metallization.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing transient voltage suppressor diodes (TVS, Transient Voltage Suppressors) using ultra-deep trenches (Ultra-deep Trench). Background technique [0002] As the integration level of electronic circuits continues to increase, the line width of integrated circuits continues to shrink. Transient voltages in circuits, in the form of electrostatic discharge (ESD) or other forms, are therefore more susceptible to damage to electronic devices. Transient Voltage Suppressor (TVS for short) is a diode-based electrostatic protection device used to protect the system from various forms of transient high voltage. Such as figure 1 and figure 2 As shown, most of the existing TVS devices are manufactured using planar diodes or simple trench diode structures. A planar TVS diode grows an N-type epitaxial layer on a P-type silicon substrate to form a PN junction o...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/329
Inventor 朱伟东吴昊赵泊然
Owner 江苏应能微电子股份有限公司
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