Semiconductor device and manufacturing method thereof
A manufacturing method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as performance stability and reliability effects, fluctuations in semiconductor devices, and avoid circuit design difficulties. Large, low-cost manufacturing method, the effect of reduced difficulty
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no. 1 approach
[0044] The semiconductor device provided by the present invention includes a substrate 1, an insulating layer 2 formed on the substrate 1, and at least a first metal interconnect layer 3 and a second metal interconnect layer 4 sequentially formed on the insulating layer 2. There is an insulating substance between each metal interconnection layer. The semiconductor device has an active area and a non-active area, and at least one plate capacitor is formed in the non-active area.
[0045] refer to figure 1 , is a schematic cross-sectional view of a partial region of the first embodiment of the semiconductor device of the present invention. The flat panel capacitor includes a first metal layer 10 and a second metal layer 20 parallel to each other. The first metal layer 10 is kept in the passive area by adjusting the etching layout in the etching process of forming the first metal interconnection layer 3. Part of the metal in the region, the second metal layer 20 is a part of th...
no. 2 approach
[0050] refer to image 3 (a) is a schematic cross-sectional view of a partial region of the second embodiment of the semiconductor device of the present invention. The first pin 101 is connected to the ground pin in the package pin of the semiconductor device, and the second pin 202 is connected to the input pin or the output pin in the package pin of the semiconductor device.
[0051] The equivalent circuit diagram of this connection is shown in image 3 As shown in (b), it is equivalent to connecting a capacitor in parallel at the input or output end of the semiconductor device, so as to realize the matching of the input or output impedance of the active region of the semiconductor device to the target input or output impedance.
no. 3 approach
[0053] refer to Figure 4 (a), is a schematic cross-sectional view of a first example of a partial region of the third embodiment of the semiconductor device of the present invention. The first pin 101 is connected to an input pin or an output pin in the package pins of the semiconductor device, and the second pin 202 is kept floating or connected to a predetermined pin in the package pins of the semiconductor device.
[0054] When the second pin 202 keeps the potential floating, the equivalent circuit schematic diagram of this connection mode is shown as Figure 4 As shown in (b), it is equivalent to connecting a capacitor in series with the input or output terminal of the semiconductor device, so as to realize the matching of the input or output impedance of the active region of the semiconductor device to the target input or output impedance.
[0055] The second pin 202 may also be connected to a predetermined pin of the package pins of the semiconductor device, so that th...
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