SiC MOS (metal oxide semiconductor) capacitor and manufacturing method

Abstract

The invention relates to a SiC MOS (metal oxide semiconductor) capacitor and a manufacturing method. The SiC MOS capacitor comprises a SiC substrate, a gate medium layer and positive and negative electrodes. A SiC extension layer is arranged on the SiC substrate. The gate medium layer comprises an upper SiO<2> transition layer, a La<x>Al<1-x>O medium layer and a lower SiO<2> transition layer, the lower SiO<2> transition layer is arranged on the SiC extension layer and is provided with the La<x>Al<1-x>O layer, and the upper SiO<2> transition layer is arranged on the La<x>Al<1-x>O layer, and the positive and negative electrodes are respectively connected with the surface of the upper SiO<2> transition layer and the back of the SiC substrate. The SiC substrate is an N-type heavy-dope SiC substrate, and the SiC extension layer is an N-type light-dope SiC extension layer. Accordingly, gate leak current is reduced, and voltage endurance and reliability of devices are improved.

Description

technical field [0001] The invention relates to a SiC MOS capacitor and a manufacturing method, in particular to a SiO 2 / La x al 1-x O / SiO 2 SiC MOS capacitance and manufacturing method of composite gate dielectric. Background technique [0002] As a typical representative of the third-generation semiconductor, SiC material has become an ideal material for making high-temperature, high-power, high-frequency and high-radiation-resistant devices due to its excellent physical and chemical properties. Compared with the first-generation semiconductor materials represented by Si and the second-generation semiconductor materials represented by GaAs, SiC materials have the advantages of large band gap, high critical breakdown electric field, and high thermal conductivity. Therefore, SiC materials and devices are currently , Process research and development has become a hot spot in the field of microelectronics technology research. Compared with other wide-bandgap semiconductor...

AI Technical Summary

Problems solved by technology

Use high-k dielectric materials, such as HfO 2 , Al 2 o 3 instead of SiO 2 Layer is used as the dielectric material of MOS devices. Although this method improves the withstand voltage capability of the dielectric layer to a certain extent, this process cannot effectively reduce the interface state density of the device, and the traps introduced by high-k materials lead to excessive gate leakage current. Due to the gate leakage current limits the gate dielectric to withstand a higher electric field

Images