Manufacturing method of semiconductor memory
A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., to achieve the effect of saving process time and reducing process cost
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0042] Please refer to figure 2 , the present embodiment provides a method for manufacturing a semiconductor memory, including:
[0043] S21, providing a semiconductor substrate having a storage region and a connection region, on which a control gate layer and a cover layer are formed;
[0044] S22, using an integrated photomask capable of defining the position of the storage unit in the storage area and the position of the connection hole in the connection area as a mask, photolithography and etching the cover layer, forming a storage window at the position of the storage unit in the storage area, and forming a storage window in the connection A connection window is formed at the connection line position of the area, and the storage window is wider than the connection window;
[0045] S23, depositing a first interlayer dielectric layer on the surface of the device forming the storage window and the connection window, and performing high-temperature reflow on the first inter...
Embodiment 2
[0060] Please refer to Figure 4 , the present embodiment provides a method for manufacturing a semiconductor memory, including:
[0061] S41, providing a semiconductor substrate having a storage region and a connection region, on which a control gate layer and a cover layer are formed;
[0062] S42, using an integrated photomask capable of defining the location of the storage unit in the storage area and the location of the connection hole in the connection area as a mask, photolithography and etching the cover layer, forming a storage window at the location of the storage unit in the storage area, and forming a storage window in the connection A connection window is formed at the connection line position of the area, and the storage window is wider than the connection window;
[0063] S43, depositing a first interlayer dielectric layer on the surface of the device forming the storage window and the connection window, and performing high-temperature reflow on the first inter...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More - R&D
- Intellectual Property
- Life Sciences
- Materials
- Tech Scout
- Unparalleled Data Quality
- Higher Quality Content
- 60% Fewer Hallucinations
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com
