A realization method of silicon carbide mosfet channel self-alignment process

Abstract

The invention discloses a silicon carbide MOSFET (metal-oxide-semiconductor field-effect transistor) channel self-alignment process realization method. The method includes the following steps that: a silicon carbide epitaxial wafer is washed; a first dielectric layer is deposited on the silicon carbide epitaxial wafer; a second dielectric layer is deposited on the first dielectric layer; the second dielectric layer is coated with a photoresist, and a primary P type base region window is formed through photolithography development; SiO2 dielectric is etched with the photoresist adopted as a mask; with residual photoresist and the SiO2 combined together and adopted as a mask, polycrystalline silicon is etched, and after etching is completed, and residual photoresist is removed; with the polycrystalline silicon adopted as an ion implantation barrier layer, aluminum ion implantation is performed, so that a P type base region can be formed; SiO2 is deposed on the polycrystalline silicon, and then is etched, so that a sidewall mask can be formed; with the polycrystalline silicon and the sidewall adopted as an ion implantation barrier layer, nitrogen ion implantation is performed, so that an N<+> source region can be formed; the SiO2 and the polycrystalline silicon are removed, and a P<+> ion implantation barrier layer can be formed; and aluminum ion implantation is performed, so that a P<+> contact region can be formed. According to the silicon carbide MOSFET channel self-alignment process realization method of the invention, the polycrystalline silicon is deposited, and the sidewall is formed, and the polycrystalline silicon and the sidewall are adopted as the P<+> contact region barrier layer, so that nitrogen ions will not be implanted in the P<+> contact region, and a stripping process is not needed.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for realizing a silicon carbide MOSFET channel self-alignment process. Background technique [0002] Silicon carbide material has excellent physical and electrical properties. With its unique advantages such as large band gap, high critical breakdown electric field, high thermal conductivity and high saturation drift speed, it has become a high-voltage, high-power, high-temperature-resistant, high-frequency, anti- It is an ideal semiconductor material for irradiation devices and has broad application prospects in military and civil affairs. Power electronic devices made of silicon carbide materials have become one of the hot devices and frontier research fields in the field of semiconductors. [0003] Silicon carbide MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor, Metal-Oxide-Semiconductor Field-Effect Transistor) has the advantages of low...

AI Technical Summary

Problems solved by technology

Existing channel self-alignment process is doing N + Before ion implantation in the source region, the P + The contact area forms a metal mask, as the P + area ion implantation barrier to block N + Implantation, this method introduces a lift-off process, which is incompatible with the silicon process; at the same time, the use of a metal barrier layer in the high-temperature ion implantation process will pollute the surface of the device and the ion implanter, such as Figure 1 to Figure 3 Shown is the flow chart of the prior art SiC MOSFET device channel self-alignment process

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