Fabrication method of three-dimensional capacitively coupled interconnect structure based on through-silicon capacitor

Abstract

The invention discloses a method for fabricating a three-dimensional capacitive coupling interconnection structure based on through-silicon capacitors, which comprises the following steps: forming two silicon substrates with the same structure, and aligning the back of one silicon substrate and bonding it to another silicon substrate form a three-dimensional capacitive coupling interconnect structure based on through-silicon capacitors; in the interconnect structure, the upper copper pillar and the lower copper pillar are coaxially arranged; the top of the lower copper pillar contacts the silicon dioxide insulation on the back of the upper silicon substrate The upper copper column and the lower copper column serve as the upper and lower plates of the capacitor respectively, and the insulating layer between the upper copper column and the lower copper column serves as the medium between the capacitors, forming a through-silicon capacitor structure. Compared with the conventional TSV process, the present invention omits the fabrication of metal bumps on the front side of the wafer, thinning and exposed copper on the back, insulation, and fabrication of micro-bumps in the fabrication process of the TSV structure, the fabrication process is obviously shortened, and the yield is improved , the required process equipment is reduced accordingly.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a manufacturing method of a three-dimensional capacitive coupling interconnection structure. Background technique [0002] Currently commonly used three-dimensional integrated interconnection structures mainly include through-silicon vias (TSV: Through Silicon Via) and capacitive / inductive coupling. TSV originated from the US patent "Semiconductive wafer and method of making the same" (3,0044,909) filed by William Shockley in 1958, which uses the "deep pits" structure to realize the signal from the front Transmission to the back. The TSV vertical interconnect structure is based on the literature "Through Silicon Via Technology–Processes and Reliability for Wafer-Level 3D System Integration" (Ramm, P. and Wolf, M.J published in ECTC 58th in 2008) and "Through-Silicon Via (TSV)" (Makoto The structure proposed by Motoyoshi in Proceedings of the IEEE in 2009 ma...

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Problems solved by technology

[0003] The purpose of the present invention is to provide a method for manufacturing a three-dimensional capacitively coupled interconnection structure based on through-silicon capacitors, so as to solve the problem of lower performance and yield after three-dimensional integration of devices caused by the complex manufacturing process of TSV vertical interconnection structures, and the problem of capacitive / inductive coupling vertical The interconnection structure cannot achieve multi-layer chip stacking, and due to the large footprint, it can only be used for three-dimensional coupling and interconnection at the periphery of the chip (such as pads), and cannot be directly used inside the 3D-IC chip to achieve three-dimensional integration like the TSV structure. interconnection problem

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