The invention discloses a method for manufacturing a three-dimensional capacitively coupled
interconnection structure based on a through-
silicon capacitor. The method comprises: forming two
silicon substrates same in structure by
machining, and bonding the back surface of one
silicon substrate to the other silicon substrate in an alignment manner; forming the three-dimensional capacitively coupled
interconnection structure based on the through-silicon
capacitor; coaxially arranging
copper columns at the upper part and the lower part of the
interconnection structure; enabling the top of the
copper column at the lower part to be in contact with a
silicon dioxide insulation layer on the back surface of the silicon substrate at the upper part; and taking the
copper column at the upper part and the copper column at the lower part as an upper
electrode plate and a lower
electrode plate of the
capacitance respectively, taking an
insulation layer between the copper column at the upper part and the copper column at the lower part as an inter-
capacitance medium, and forming a through-silicon
capacitor structure. Compared with a conventional TSV process, the method has the characteristics that the technological processes of making
metal convex points on the front surface of a
wafer,
thinning the back surface to
expose copper, performing insulation treatment, making micro-convex points and the like in a TSV structure making process are removed, the technological processes are remarkably reduced, the yield is increased, and required process devices are correspondingly reduced.