Circuit structure and manufacturing method thereof

Abstract

A circuit structure and a manufacturing method thereof are provided. The circuit structure comprises a substrate, a circuit layer forming on the surface of the substrate and a second dielectric layer forming on a first dielectric layer. The circuit layer comprises a first surface and a second surface which are opposite and side surfaces connecting the first surface and the second surface. The circuit layer is in contact with the substrate via the second surface. A reflective index of the second dielectric layer is smaller than the reflective index of the first dielectric layer. An adhesive force between the second dielectric layer and the circuit layer is enhanced by the first dielectric layer, thereby raising the yield rate of the whole circuit structure.

Description

technical field [0001] The invention relates to a circuit structure, in particular to a circuit structure capable of preventing delamination of a passivation layer on an outer circuit. Background technique [0002] With the vigorous development of the electronics industry, many high-end electronic products are gradually developing towards light, thin, short, small and other high-density directions. With the evolution of packaging technology, chip packaging technology is becoming more and more diversified. Semiconductor packaging The size or volume of the semiconductor package is also continuously reduced, so that the semiconductor package can be thinner and smaller. [0003] Flip-chip technology has the advantages of reducing the chip packaging area and shortening the signal transmission path. It has been widely used in the field of chip packaging, such as Chip Scale Package (CSP), Direct Chip Attached (DCA) and multi-chip die. Multi-Chip Module (MCM) and other types of pac...

AI Technical Summary

Problems solved by technology

[0013] However, since the material forming the wiring layer 21 is copper, the coefficient of thermal expansion (CTE) between the wiring layer 21 and the passivation layer 22 is different. In the subsequent flip-chip ball planting process, multiple high-temperature processes are required, resulting in Delamination occurs between the circuit layer 21 and the passivation layer 22, resulting in lower yield

[0014] Therefore, how to overcome the above-mentioned problems in the prior art, improve the problem of delamination caused by the difference in thermal expansion coefficient between the circuit layer and the passivation layer, and improve the product yield is an urgent development direction in the industry.

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