Formation method of semiconductor structure

Abstract

The invention provides a method for forming a semiconductor structure. The method comprises following steps: providing a substrate and a first interlayer dielectric layer; the substrate comprises a device region and a peripheral region, wherein the device region is surrounded by the peripheral region; forming a second interlayer dielectric layer on the surface of the first interlayer dielectric layer; forming a photoresist layer having a first opening on the second interlayer dielectric layer of the device region; using the photoresist layer as a mask film, etching the second interlayer dielectric layer of the device region until a grating conducting layer surface is exposed, forming contact holes in the second interlayer dielectric layer of the device region, and forming a polymer layer on the peripheral region substrate; performing first sloped etching processing on the polymer layer, wherein the etching gas comprises H2; performing second sloped etching processing on the polymer layer, etching and to remove the polymer layer, wherein the etching gas comprises fluorine-containing gases; forming conductive plugs which are full of contact vias. According to the method, the technology difficulty in removing polymer layer is reduced and the polymer layer is removed completely so that the harmful effect of polymer layer peeling off is avoided, and yield rate of semiconductor structures is increased.

Description

technical field [0001] The invention relates to the technology in the field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] With the development of integrated circuits to ultra-large scale integrated circuits, the circuit density inside integrated circuits is increasing, and the number of components contained is also increasing. In a semiconductor integrated circuit, a Metal Oxide Semiconductor (MOS, Metal Oxide Semiconductor) transistor is one of the most important components. [0003] The existing MOS transistor process is to form a gate structure on a semiconductor substrate, form a source region and a drain region in the semiconductor substrate on opposite sides of the gate structure; then form contacts on the gate structure, source region and drain region The contact via is filled with metal in the contact hole to form a conductive plug, and the external circuit is electrically connected to ...

AI Technical Summary

Problems solved by technology

[0004] However, the production yield and chip output of the prior art semiconductor structures still need to be improved

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