Perpendicular LED chip structure and preparation method therefor

Abstract

The invention provides a preparation method for a perpendicular LED chip structure. The preparation method comprises the steps of 1) providing a growth substrate, and forming an epitaxial layer on the growth substrate; 2) forming a metal electrode layer and a bonding substrate on the epitaxial layer in sequence; and 3) peeling off the growth substrate by low-energy laser, wherein the overlapping ratio of adjacent two small light spots is greater than 50%. The invention also provides the perpendicular LED chip structure, wherein the perpendicular LED chip structure comprises the bonding substrate, and the metal electrode layer, a P-GaN layer, a multi-quantum-well layer and an N-GaN layer which are positioned on the bonding substrate in sequence, and a passivation layer and an N electrode which are positioned on the surface of the N-GaN layer in sequence. By adoption of the preparation method, the problem of cracking or severe deformation of the bonding substrate easily caused by high wafer stress after bonding in the perpendicular process of the large-dimensional LED chip is solved; and meanwhile, the problems of severe electric leakage and extremely low rate of finished products directly caused by severe microcosmic influence of the epitaxial layer structure and the performance are also solved.

Description

technical field [0001] The invention belongs to the field of LED chips, in particular to a vertical LED chip structure and a preparation method thereof. Background technique [0002] As we all know, due to the constraints of non-conductivity and poor thermal conductivity of the sapphire substrate, the traditional front-mount LED chip has inherent defects such as uneven current distribution and poor heat dissipation. In order to overcome these shortcomings of the front-mount LED chip, the industry is actively developing a vertical-structure LED chip (hereinafter referred to as V-LED). V-LED adopts Si or metal substrate with high conductivity and good heat dissipation. The substrate has good heat conduction, the heat dissipation problem of PN junction is solved, and large-size power chips can be realized. [0003] The two electrodes of the V-LED chip are on both sides of the LED epitaxial layer. Since the patterned electrodes and all the P-type confinement layers are used as ...

AI Technical Summary

Problems solved by technology

[0007] For the vertical process of wafers with a size of 4 inches or larger, the stress accumulated per unit area in the wafer increases greatly after bonding. If the stress is not released uniformly during the peeling process, it is easy to cause the bonded conductive substrate to crack or The deformation is serious, and it has a bad microscopic impact on the structure and performance of the GaN epitaxial layer, which directly leads to serious leakage, resulting in extremely low yield

This is also a technical problem that the current vertical structure LED wafer size is concentrated in 2inch and difficult to break through to 4inch.

[0008] Moreover, this problem cannot be solved simply by reducing the laser spot. When the laser spot is irradiated on the GaN at the interface through a transparent sapphire substrate, it is necessary to achieve a good connection between the laser spot and the spot to avoid damage caused by the overlap of the spot. The GaN layer is ruptured due to repeated irradiation at a certain place, which requires very strict accuracy of the scanning control system. At the same time, it is necessary to perform beam shaping on the spot under the premise of ensuring a high laser optical power density. This not only High requirements are placed on the laser output power, which increases the complexity of the laser optical system, which will result in a large and expensive laser lift-off system

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