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LED epitaxial wafer growing on yttrium aluminum garnet substrate and manufacturing method

A technology of LED epitaxial wafer and yttrium aluminum garnet, which is applied in the field of LED epitaxial wafer and preparation, can solve the problems of affecting the performance of GaN-based devices, reducing the carrier mobility of materials, reducing the internal quantum efficiency of the device, etc., so as to improve the internal quantum efficiency. Efficiency, improved radiation recombination efficiency, small lattice mismatch

Inactive Publication Date: 2016-10-12
HEYUAN CHOICORE PHOTOELECTRIC TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, due to the lattice mismatch between sapphire and GaN as high as 13.3%, resulting in a density of ~10 9 cm -2 dislocation defects, thereby reducing the carrier mobility of the material and shortening the carrier lifetime, which in turn affects the performance of GaN-based devices
Secondly, due to the low thermal conductivity of sapphire (25W / m K at 100°C), it is difficult to discharge the heat generated in the chip in time, resulting in heat accumulation, which reduces the internal quantum efficiency of the device and ultimately affects the performance of the device

Method used

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  • LED epitaxial wafer growing on yttrium aluminum garnet substrate and manufacturing method
  • LED epitaxial wafer growing on yttrium aluminum garnet substrate and manufacturing method
  • LED epitaxial wafer growing on yttrium aluminum garnet substrate and manufacturing method

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Embodiment 1

[0037] A kind of LED epitaxial wafer grown on the yttrium aluminum garnet substrate, its preparation method comprises the following steps:

[0038] (1) Selection of the substrate and its crystal orientation: Y 3 al 5 o 12 The substrate, with the (111) plane offset from the (100) plane by 0.5° as the epitaxial plane, the crystal epitaxial orientation relationship is: the (0001) plane of GaN is parallel to the Y 3 al 5 o 12 (111) side;

[0039] (2)Y 3 al 5 o 12 Substrate surface annealing treatment, the specific process is: Y 3 al 5 o 12 The substrate was placed in the reaction chamber, and the Y 3 al 5 o 12 The substrate is annealed in situ for 2 hours, and the annealing treatment can make Y 3 al 5 o 12 The substrate obtains an atomically flat surface;

[0040] (3) Epitaxial growth of GaN buffer layer: Y 3 al 5 o 12 The substrate temperature was adjusted to 400°C, and the pressure in the reaction chamber was 4.0×10 -3 A GaN buffer layer with a thickness of ...

Embodiment 2

[0049] A kind of LED epitaxial wafer grown on the yttrium aluminum garnet substrate, its preparation method comprises the following steps:

[0050] (1) Selection of the substrate and its crystal orientation: Y 3 al 5 o 12 The substrate, with the (111) plane offset from the (100) plane by 1° as the epitaxial plane, the crystal epitaxial orientation relationship is: the (0001) plane of GaN is parallel to the Y 3 al 5 o 12 (111) side;

[0051] (2)Y 3 al 5 o 12 Substrate surface annealing treatment, the specific process is: Y 3 al 5 o 12 The substrate was placed in the reaction chamber, and the Y 3 al 5 o 12 The substrate is subjected to in-situ annealing treatment for 1 hour, and the annealing treatment can make the substrate obtain an atomically flat surface;

[0052] (3) Epitaxial growth of GaN buffer layer: Y 3 al 5 o 12 The substrate temperature was adjusted to 500°C, and the pressure in the reaction chamber was 6.0×10 -3 A GaN buffer layer with a thickness ...

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Abstract

The invention discloses an LED epitaxial wafer growing on a yttrium aluminum garnet substrate, which comprises the yttrium aluminum garnet substrate. A GaN buffer layer, a non-doped GaN layer, an n-type doped GaN thin film, an InGaN / GaN quantum well and a p-type doped GaN thin film sequentially grow on the yttrium aluminum garnet substrate. The LED epitaxial wafer has the advantages of low trap density, good crystalline quality and good electrical and optical performance. The invention also discloses a method of manufacturing the LED epitaxial wafer on the yttrium aluminum garnet substrate. The manufacturing method has a simple process, and the manufacturing cost is low.

Description

technical field [0001] The invention relates to an LED epitaxial wafer and a preparation method thereof, in particular to an LED epitaxial wafer grown on a yttrium aluminum garnet substrate and a preparation method thereof. Background technique [0002] Light-emitting diode (LED), as a new type of solid-state lighting source, is considered to be a green lighting source in the 21st century due to its advantages of low calorific value, low power consumption, fast response, long life, and small size. Facing the market demand for high-power lighting in the future, the luminous efficiency of LED still needs to be further improved if it is to be widely used on a large scale. At present, LED chips are mainly prepared by GaN material systems grown on sapphire substrates. However, due to the lattice mismatch between sapphire and GaN as high as 13.3%, resulting in a density of ~10 9 cm -2 The dislocation defects of the material reduce the carrier mobility of the material and shorte...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L33/00H01L33/12H01L21/02
CPCH01L33/12H01L21/0242H01L21/02433H01L21/02458H01L21/02499H01L21/02516H01L21/0254H01L21/02631H01L21/02634H01L33/0066H01L33/0075
Inventor 李国强
Owner HEYUAN CHOICORE PHOTOELECTRIC TECH CO LTD
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