Semiconductor memory and manufacturing method thereof

Abstract

A semiconductor memory and its manufacturing method. The method includes: providing a semiconductor substrate, forming a tunnel oxide layer on the semiconductor substrate, forming a selection gate and a floating gate on the surface of the tunnel oxide layer, A control gate is formed, and an inter-gate dielectric layer is formed between the floating gate and the control gate. The invention greatly reduces the operating voltage of the memory, accelerates the reaction rate of the memory, improves the data storage capacity of the memory, and is more conducive to the miniaturization of the device through the double polysilicon layer gate structure formed by the floating gate and the control gate. development.

Description

technical field [0001] The present invention relates to the field of semiconductors, in particular to a semiconductor memory and a manufacturing method thereof, especially to an MTP (Multi-Time Programmable, multi-time programmable) memory. Background technique [0002] With the continuous improvement of performance requirements of electronic equipment, MTP memory is more and more widely used as a storage device of various electronic equipment. MTP memory has multiple data storage, reading and erasing operations. It can store data without continuously applying electric energy and the stored data will not disappear after power off, and the data can be realized by applying a certain voltage. erasure. [0003] Figure 1A For the top view of conventional MTP memory, Figure 1B It is a structural sectional view along the A-A' direction in Fig. 1. A traditional MTP memory is a dual-transistor device, including a semiconductor substrate 100; a device isolation structure 101 is f...

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Problems solved by technology

The applied voltage is more than 8 megavolts per square centimeter, and the reaction rate is relatively slow, which is more than 2-10 milliseconds, and the thicker the tunnel oxide layer 106, the greater the required applied voltage, and the slower the reaction rate of the memory. Affect the data reading capability of the memory; meanwhile, the surface of the floating gate 105 has no protective layer, and the stored charge is easy to lose, thus weakening the data storage capability of the memory

[0006] Furthermore, devices in the logic area need to be connected to other circuits or external circuits through contact holes and metal layers. However, with the development of miniaturization of devices, the process of forming contact holes on the surface of the active region is also constantly challenged. The spacing control of the electrodes and whether the active area can completely cover the contact hole area have become technological issues that need to be broken through in the development of device miniaturization.

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