Diffusion method of solar cell silicon chip

Abstract

Provided is a diffusion method of a solar cell silicon chip. The silicon chip is arranged in a diffusion furnace, the diffusion furnace is provided with five temperature areas, the five temperature areas comprise temperature I, temperature II, temperature III, temperature IV, and temperature V, and the five temperature areas are distributed along the height direction. A control method of the diffusion furnace includes following steps: (1) starting; (2) boat-in; (3) heating; (4) pre-oxidation; (5) diffusion; (6) first push; (7) second push; (8) third push; (9) post-oxidation; (10) constant temperature; (11) boat-out; (12) finishing; and (13) cooling so that the chip is discharged. Compared with the prior art, the method is advantageous in that the uniformity of processed PN junctions is good, and the performance stability of the product is good.

Description

technical field [0001] The invention belongs to the technical field of solar cell preparation, in particular to a method for diffusing a solar cell silicon wafer. Background technique [0002] The production process of solar cells is relatively complicated. Simply put, the current production process of solar cells mainly includes: texturing, diffusion, etching, coating, printing and sintering. The PN junction is equivalent to the heart of a solar cell, and it is also one of the keys to the quality of the battery. Therefore, diffusion is an important part of making a solar cell. [0003] Diffusion to make a PN junction is a key step in the production of solar cells, and the quality of the PN junction directly determines the conversion efficiency of the solar cell. In the existing diffusion method, after feeding nitrogen and oxygen containing phosphorus oxychloride into the diffusion furnace for deposition, the temperature in the diffusion furnace is raised to a certain tempe...

AI Technical Summary

Problems solved by technology

[0004] To reduce the surface doping concentration, the most commonly used method is to reduce the flux of the phosphorus source, but this method will make the phosphorus source not fully mixed in the diffusion gas, which will cause uneven internal resistance of the silicon wafer after diffusion; at the same time, due to the phosphorus The source content is small, so to a large extent, the concentration of the phosphorus source at the inlet and outlet of the diffusion furnace has a large difference in phosphorus source concentration. This concentration difference will cause a large difference in the square resistance between the diffusion silicon wafers, that is The uniformity of square resistance becomes worse

In addition, due to the low concentration of phosphorus source, it is necessary to increase the diffusion process time or increase the diffusion temperature under the premise of ensuring sufficient doping amount; and in the case of low phosphorus source, high temperature diffusion will further affect the square resistance. Uniformity

[0005] However, the uniformity of the silicon wafer PN junction produced by the existing technology is poor, resulting in poor performance stability of the product