Matrix power amplifier based on transistor stacking structure

Abstract

The invention discloses a matrix power amplifier based on a transistor stacking structure. The matrix power amplifier comprises an input matching network, a power distribution network, a stacked matrix amplification network, a power synthetic network and an output matching network, which are connected in sequence, and a first biasing circuit and a second biasing circuit which are symmetrically connected with the stacked matrix amplification network respectively. A power amplifier chip circuit realized by the matrix power amplifier based on the transistor stacking structure is wide in bandwidth, high in output power, high in power gains and small in area.

Description

technical field [0001] The invention relates to field effect transistor radio frequency power amplifiers and the field of integrated circuits, in particular to a matrix power amplifier based on a transistor stacking structure applied to a transmitting module at the end of an ultra-wideband transceiver. Background technique [0002] With the rapid development of wireless communication markets such as ultra-wideband communication, software radio, and wireless local area network (WLAN), RF front-end transceivers are also required to develop in the direction of high integration, low power consumption, compact structure, and low price. [0003] As an important module of the transmitter, the RF and microwave power amplifier is the circuit that consumes the most energy in the entire transmitter, and its output power requirements are relatively high. When the integrated circuit process is used to design and implement the chip circuit of the RF and microwave power amplifier, its perfo...

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Problems solved by technology

[0004] (1) High-power and high-efficiency amplification capability is limited: With the development of semiconductor technology and the trend of proportional reduction in transistor size, the gate length of transistors is getting shorter and shorter, resulting in a decrease in breakdown voltage and an increase in knee voltage , thus limiting the transistor drain output voltage swing, which in turn limits the power capability of a single transistor

At present, a typical solution is to arrange multiple transistors (8 to 32) in parallel for power synthesis to improve power tolerance. However, this solution increases gate-source capacitance, reduces input impedance, and increases It eliminates the difficulty of designing the impedance matching of the input circuit. At the same time, the optimal output load impedance of the transistor amplifier using this structure is very small, and an additional output impedance matching network is required for the impedance matching design of the output circuit. Therefore, the output is also increased. The impedance matching design of the circuit is difficult. At the same time, using multiple transistors arranged in parallel to form a composite structure will occupy a large chip area, thereby greatly increasing the chip production cost.

[0005] (2) Ultra-wideband high power amplification capability is limited: In the design process of RF power amplifiers, affected by the gain-bandwidth product of transistors, designers always have to compromise between the two indicators of power amplifier bandwidth and power gain

[0007] It can be seen that the design difficulties of ultra-wideband RF power amplifiers based on integrated circuit technology are: (1) high power output under ultra-wideband is more difficult; (2) high power gain under ultra-wideband is more difficult; (3) ) The chip area of ​​the traditional method under UWB is relatively large

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