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On-chip learning neural network processor

A neural network and neural network learning technology, applied in the direction of biological neural network model, physical realization, etc., can solve the problems of lack of general potential and not suitable for popularization, and achieve the goal of improving data throughput and computing speed and reducing hardware area Effect

Inactive Publication Date: 2017-12-15
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As the underlying platform, GPU plays the role of computing acceleration, but power consumption, cost and area are the main factors restricting it
In contrast, FPGA programmable chips or artificial neural network dedicated chips have higher requirements for implanting servers, programming environments, and programming capabilities, and lack general potential, so they are not suitable for popularization.

Method used

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  • On-chip learning neural network processor
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  • On-chip learning neural network processor

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Embodiment 1

[0038] The present invention provides an on-chip learning neural network processor, see figure 1 , including: neural state controller module, data interface module, neural network forward operation control module, neural network learning algorithm control module, neural operation unit module, neuron weight buffer module, activation function module and data buffer module connection ;

[0039]The neural state controller module is respectively connected with the data interface module, the neuron weight buffer module, the neural network forward operation control module, the neural network learning algorithm control module, the activation function module, and the data buffer module. The neural state controller module controls the data interface module to perform data interaction, and monitors the working state of the neural network forward operation control module and the neural network learning algorithm control module, and simultaneously generates the current neural working state...

Embodiment 2

[0079] The present invention provides a kind of work based on on-chip learning neural network processor is divided into two stages, see figure 2 ,Specifically:

[0080] Phase 1: Training (learning) of the neural network

[0081] 1) Data preparation and preprocessing

[0082] Load the training sample data into the data buffer area through the data interface module, and randomly initialize the neuron weight buffer area through the random initialization module. After the data preparation is completed, load the data in the data buffer area and the neuron weight buffer area into the data The preprocessing module performs preprocessing.

[0083] 2) Neural network parameter configuration

[0084] Load the neural network parameters such as the number of neurons in the input layer, the number of neurons in the hidden layer, the number of neurons in the output layer, the activation function of the hidden layer, the activation function of the output layer, the learning rate, the erro...

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PUM

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Abstract

The invention discloses an on-chip learning neural network processor comprising a data interface module, a data preprocessing module, a data cache region module, a neuron weight cache region module, a random initialization module, a neural computing unit module, a neural network forward computing control module, an activation function module, a neural state controller module and a neural network learning algorithm control module. The neural state controller module controls all the unit modules to cooperatively work to perform neural network learning and reasoning. The neural computing unit module is designed by using general hardware acceleration computing for programmable control of the neural network computing type and computing scale. The assembly line technology is added in the design so that the data throughput and the computing speed can be greatly enhanced, the focus is put on optimization of the multiply-add units of the neural computing unit and the hardware area can be greatly reduced. Hardware mapping is performed on the neural network learning algorithm so that the neural network processor is enabled to perform on-chip learning and offline reasoning.

Description

technical field [0001] The present invention relates to the field of integrated circuits and the field of artificial intelligence, in particular to an on-chip learning neural network processor. Background technique [0002] In the field of machine learning and cognitive science, artificial neural network (ANN), referred to as neural network or neural network, is a mathematical model that imitates the structure and function of biological neural network (animal's central nervous system, especially the brain) or Computational models for estimating or approximating functions. An artificial neural network is similar to a biological neural network in that it can compute parts of a function collectively and in parallel without describing the specific tasks of each unit. [0003] In the current Internet big data background, artificial neural network (ANN)-based brain-inspired computing has been applied in big data processing and analysis, and artificial intelligence has made a majo...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/063
CPCG06N3/063
Inventor 刘洋伍元聪王俊杰詹稀童钱堃于奇
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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