Anti-PID (Potential Induced Degradation) assembly and manufacturing method thereof
A technology for components and lamination equipment, applied in electrical components, semiconductor devices, photovoltaic power generation, etc., can solve the problems of increasing silicon nitride thickness, square resistance fluctuation, increasing component cost, etc., and achieve good conductivity and high transmittance. , strong adsorption effect
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[0050] The present invention will be described in detail below in conjunction with the embodiments. It should be noted that the described embodiments are only intended to facilitate the understanding of the present invention, and have no limiting effect on it.
[0051] According to an anti-PID assembly provided by the present invention, it includes a front glass 2, a first encapsulation layer 4, at least one photovoltaic solar cell 5, a second encapsulation layer 6, a back plate 8 and an assembly frame 9, the front glass 2 and the first encapsulation layer An ultra-thin two-dimensional electrical nanomaterial layer is arranged between the first encapsulation layer 4 and between the second encapsulation layer 6 and the backplane 8;
[0052] The side of the ultra-thin two-dimensional electrical nanomaterial layer is connected to the frame 9 of the component.
[0053] Among them, preferably, both the first encapsulation layer 4 and the second encapsulation layer 6 are cut EVA.
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