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Semiconductor structures and methods of forming them

A semiconductor and gate structure technology, applied in the field of semiconductor structure and its formation, can solve the problems of addressable memory performance to be improved, achieve the effect of improving data storage capacity, improving threshold voltage characteristics, and improving electron loss problems

Active Publication Date: 2020-11-27
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the performance of the prior art content addressable memory needs to be improved

Method used

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  • Semiconductor structures and methods of forming them
  • Semiconductor structures and methods of forming them
  • Semiconductor structures and methods of forming them

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Experimental program
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Effect test

Embodiment Construction

[0030] It can be seen from the background art that the performance of content addressable memory (Content Addressable Memory, CAM) needs to be improved.

[0031] Specifically, after the content-addressable memory is subjected to the baking (Bake) treatment of the reliability test or after the long-term idle (Idle), the content-addressable memory is prone to data retention failure (Data Retention Fail) and threshold voltage shift ( Vt Shift) problem.

[0032] combined reference figure 1 and figure 2 , figure 1It is a relational graph of the threshold voltage of a content addressable storage unit corresponding to a content addressable memory and the number of samples of the content addressable storage unit; figure 2 yes figure 1 The graph showing the relationship between the threshold voltage of the content-addressable memory unit and the number of samples of the content-addressable memory unit after the content-addressable memory is baked. in, figure 1 and figure 2 ...

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Abstract

A semiconductor structure and its forming method, the forming method comprising: providing a substrate, including a cell memory area and a content addressable memory area; forming a gate structure on the substrate, including a tunnel oxide layer and a floating gate structure located on the tunnel oxide layer A gate layer; a first source-drain doped region is formed in the substrate on both sides of the gate structure of the unit memory region; a second source-drain doped region is formed in the substrate on both sides of the gate structure of the content addressable memory region, and the second The doping concentration of the second source-drain doping region is lower than that of the first source-drain doping region. By reducing the doping concentration of the second source-drain doped region, the initial threshold voltage of the content-addressable memory is increased, and the electrons in the floating gate layer in the intrinsic state are correspondingly increased, so trap-assisted tunneling can be improved. effect, thereby improving the data storage capacity of the content addressable memory; in addition, the doping concentration of the first source-drain doping region is not affected, so that the performance of the unit memory region is not affected.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] At present, flash memory (Flash), also known as flash memory, has become the mainstream of non-volatile memory. According to different structures, flash memory can be divided into two types: Nor Flash and NAND Flash. The main feature of flash memory is that it can keep stored information for a long time without power on, and has the advantages of high integration, fast access speed, easy erasing and rewriting, etc., so it has been widely used in many fields such as microcomputer and automatic control a wide range of applications. [0003] Among them, NAND Flash includes not only cell (Cell) memory, but also content addressable memory (Content Addressable Memory, CAM). Content-addressable memory is a special type of memory that can search the entire memory in a single operation, so i...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11524H10B41/35
CPCH10B41/35
Inventor 张璐查源卿
Owner SEMICON MFG INT (SHANGHAI) CORP
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