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ldmos device

A device and semiconductor technology, applied in the field of laterally diffused metal oxide semiconductor devices, can solve the problems of thick oxide layer thickness and unsatisfactory depletion effect, and achieve the effect of reducing specific on-resistance and substrate resistance.

Active Publication Date: 2022-07-08
SHENZHEN SANRISE TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The thickness of the oxide layer is relatively thick, and its depletion effect is not ideal

Method used

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Examples

Experimental program
Comparison scheme
Effect test

no. 1 example L

[0061] The LDMOS device according to the first embodiment of the present invention:

[0062] like image 3 shown is a schematic structural diagram of the LDMOS device according to the first embodiment of the present invention; the LDMOS device according to the embodiment of the present invention includes:

[0063] N-type heavily doped semiconductor substrate 1 .

[0064] In the embodiment of the present invention, the semiconductor substrate 1 is a silicon substrate, and the first epitaxial layer 2 is a silicon epitaxial layer. The doping impurities of the semiconductor substrate 1 are phosphorus or arsenic. Preferably, the doping impurity of the semiconductor substrate 1 is arsenic. Since the diffusion rate of arsenic in silicon is lower, the effect of arsenic is better.

[0065] A lightly doped first epitaxial layer 2 of the second conductivity type is formed on the surface of the semiconductor substrate 1 .

[0066] Channel regions 5 doped with the second conductivity t...

no. 2 example L

[0082] The LDMOS device according to the second embodiment of the present invention:

[0083] like Figure 4 shown is a schematic structural diagram of the LDMOS device according to the second embodiment of the present invention; the difference between the LDMOS device according to the second embodiment of the present invention and the LDMOS device according to the first embodiment of the present invention is:

[0084] The connecting structure consists of deep hole contacts 12b, in Figure 4 The connecting structure is represented by the mark 12b alone in the middle. The bottom of the deep hole contact 12b passes through the channel region 5 and the first epitaxial layer 2 and is in contact with the semiconductor substrate 1; the top of the deep hole contact 12b is connected to the source electrode.

no. 3 example L

[0085] The LDMOS device of the third embodiment of the present invention:

[0086] like Figure 5 shown is a schematic structural diagram of the LDMOS device according to the third embodiment of the present invention; the LDMOS device according to the third embodiment of the present invention is formed by further improvement on the basis of the LDMOS device in the second embodiment of the present invention. Further improvements of LDMOS devices are:

[0087] The LDMOS device is an N-type LDMOS device, the first conductivity type is N-type, and the second conductivity type is P-type. A second contact region 13 heavily doped with P-type is formed at the bottom of the channel region 5 , and the second contact region 13 is in contact with the channel region 5 and the first epitaxial layer 2 respectively and serves to reduce the The contact resistance between the channel region 5 and the first epitaxial layer 2 further increases the strike of the NPN triode composed of the drift ...

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Abstract

The invention discloses an LDMOS device, comprising: an N-type heavily doped semiconductor substrate and a second conductive type lightly doped first epitaxial layer on its surface; The impurity channel region and the drift region doped with the first conductivity type; the planar gate structure formed by the superposition of the gate oxide layer and the polysilicon gate; the heavily doped source region of the first conductivity type is formed on the surface of the channel region, and the first conductivity The type of heavily doped drain region is formed on the surface of the drift region; a connection structure through the channel region and the first epitaxial layer is formed between the source region and the semiconductor substrate, and the connection structure makes the source region and the bottom semiconductor substrate Electrical connection is formed; by setting the semiconductor substrate to be heavily doped N-type, the specific on-resistance of the device can be reduced by utilizing the characteristics of N-type doping that is easier to increase doping concentration and higher electron mobility. The present invention can reduce the specific on-resistance of the device.

Description

technical field [0001] The present invention relates to a semiconductor integrated circuit, in particular to a laterally diffused metal oxide semiconductor (LDMOS) device. Background technique [0002] like figure 1 As shown, it is a schematic structural diagram of the first existing LDMOS device; figure 1 The N-type LDMOS device is used as an example to illustrate. The P-type LDMOS device and the N-type LDMOS device can be integrated on the same semiconductor substrate, so the doping type of the device structure on the semiconductor substrate can be changed accordingly. The P-type LDMOS device is obtained, so the P-type LDMOS device will not be described in detail. The first existing LDMOS devices include: [0003] P-type heavily doped semiconductor substrate such as silicon substrate 101 . [0004] A lightly doped P-type epitaxial layer 102 is formed on the surface of the semiconductor substrate 101, and the dopant concentration is usually 1e14cm -3 ~1e16cm -3 betwee...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/10
Inventor 肖胜安
Owner SHENZHEN SANRISE TECH CO LTD