Three-dimensional optoelectronic integrated optical grating coupler realized based on CMOS post-process and preparation method thereof

Abstract

The invention relates to a three-dimensional optoelectronic integrated optical grating coupler and a preparation method thereof. The three-dimensional optoelectronic integrated optical grating couplercomprises an isolation layer, a first optoelectronic device layer, a monitoring layer, a buffer layer, a second optoelectronic device layer and a protection layer which are deposited on a CMOS integrated circuit from bottom to top, wherein a plurality of through holes penetrate through all the layers, the through holes are filled with metal which is in contact with electrodes of the CMOS integrated circuit, and interconnection electrodes are arranged above the through holes; the first optoelectronic device layer is used for preparing a lower-layer optical grating coupler which interacts withthe CMOS integrated circuit; the second optoelectronic device layer is used for preparing an upper-layer optical grating coupler which is in optical interconnection with the first optoelectronic device layer. The single-chip integration of the optical grating coupler and the CMOS integrated circuit can be realized, three-dimensional optical interconnection is realized, the transmission loss of inter-layer optical interconnection is reduced, and the inter-layer coupling efficiency is maximized. The coupler is compatible with a CMOS technology, is easy to prepare, can be used for three-dimensional optoelectronic integration, and realizes integration of a high-density optoelectronic device and a microelectronic circuit.

Description

Technical field [0001] The invention relates to the technical field of photoelectric integration, in particular to a three-dimensional photoelectric integrated grating coupler realized based on a CMOS post process and a preparation method thereof. Background technique [0002] With the continuous development of integrated circuit technology in the direction of high speed and high integration, Moore's Law is facing the ultimate challenge of chip integration. Traditional electrical interconnection inevitably has problems such as high delay, high power consumption and serious signal crosstalk. So people turned their attention to a new generation of interconnection technology-optical interconnection. Optical interconnection has the advantages of wide bandwidth, anti-electromagnetic interference, strong confidentiality, low loss and low power consumption, while silicon-based optical interconnection can play the advantages of wide bandwidth, low crosstalk, low loss and compatibility wi...

AI Technical Summary

Problems solved by technology

If the spacing of different planar optoelectronic device layers deviates from the i

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