A High-Speed Current Sampling Circuit with Ultra-Low Power Consumption
A technology of current sampling and ultra-low power consumption, which is applied in the direction of reducing power consumption, logic circuits and circuits with logic functions, etc., can solve the problems of lack of integration, difficulty in matching the time constants of two branches, etc., and achieve faster transient state response, faster settling time, and low power consumption
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[0043] The present invention will be further elaborated below in conjunction with the accompanying drawings and specific embodiments.
[0044] The topological structure diagram of the current sampling circuit proposed by the present invention is as follows figure 1 As shown, it includes a sampling module and an auxiliary clamping module. The sampling module includes an operational amplifier and a first NMOS transistor NM1. The gate of the first NMOS transistor NM1 is connected to the gate of the power transistor in the switching power supply, and its drain is connected to the power transistor. The drain of the operational amplifier is connected to the power supply voltage, and its source is connected to the negative input terminal of the operational amplifier; the positive input terminal of the operational amplifier is connected to the source of the power tube, and the output voltage of the operational amplifier returns to the negative input terminal of the operational amplifie...
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