Flash memory making method, flash memory and photomask plate

Abstract

The invention relates to a flash memory making method, which relates to a semiconductor integrated circuit making method. In the flash memory making process, when a CRS process is carried out, by using the photomask plate, the first part area of each field oxide layer on a semiconductor substrate after the CRS process internally forms a groove, a control gate for forming the flash memory in a subsequent process is formed above the groove, the second part area, except the first part area, of each field oxide layer on the semiconductor substrate does not internally form a groove, a field oxide layer between the control gates is not etched, growth of a subsequent inter-gate dielectric layer is flat, the DEP of the control gate is also flat, etching of the control gate is easier, the uniformity between the control gates is also better, and the performance of the flash memory is greatly improved.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for manufacturing a flash memory, a flash memory and a photomask mask. Background technique [0002] Among semiconductor integrated circuits, flash memory is widely used in consumer electronic products such as mobile phones and digital cameras and portable systems due to its non-volatile characteristics. Non-volatile storage technologies mainly include floating gate (floating gate) technology, split gate (split gate) technology and SONOS (Silicon-Oxide-Nitride-Oxide-Silicon, silicon-silicon dioxide-silicon nitride-silicon dioxide -Silicon) technology, SONOS (Silicon-Oxide-Nitride-Oxide-Silicon, silicon / silicon dioxide / silicon nitride / silicon dioxide / silicon) flash memory due to its simple process, low operating voltage, high data reliability and ease of use It is widely used due to its advantages of being integrated into standard CMOS tech...

AI Technical Summary

Problems solved by technology

Due to the existing photomask layout, the shallow trench isolation between the control gates is etched away, so there is a height difference before the control gate grows, resulting in such as Figure 4 It is shown that after the growth of the control grid, the surface will also be ups and downs, which will cause difficulty in the subsequent etching of the control grid, so the uniformity between the control grids is poor, which seriously affects the control grid. Uniformity between

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