Integrated I2C interface verification controller design method based on FPGA

Abstract

The invention discloses an integrated I2C interface verification controller design method based on an FPGA. The integrated I2C interface verification controller design method is characterized in thata verification controller is developed based on the FPGA, and a master-slave integrated design architecture is adopted; the master-slave integrated design architecture carries out hierarchical abstraction on an I2C communication process, and integrates an I2C communication master machine and an I2C communication slave machine into a whole, so as to realize unified packaging and internal structurehierarchical design of an external interface of a verification controller; the external interface comprises an address bus interface, a data bus interface, a control request signal interface, a data request signal interface and a completion signal interface; and the internal hierarchical structure comprises a main control unit comprising the control request signal interface, a byte control unit and a bit control unit. The integrated I2C interface verification controller design method can improve the configurability, the reusability and the operation simplicity of the I2C interface verificationcontroller, can greatly improve the I2C interface verification sufficiency and the I2C interface verification efficiency, and can improve the verification efficiency by at least more than 40%.

Description

technical field [0001] The invention relates to a field programmable gate array (FPGA) software verification technology, in particular to an FPGA-based integrated I2C interface verification controller design method. Background technique [0002] I2C bus (InterICBUS) is a bus developed by Philips for connecting chips. Due to its simple structure, multi-machine communication can be realized through only two signal lines (clock line SCL and data line SDA), and efficient transmission performance And the reliability of the protocol makes the I2C bus widely used in single-chip microcomputer, serial E2PROM, LCD and other devices. [0003] FPGA is a semiconductor chip with programmable logic units inside. Developers use hardware description language (VHDL or Verilog) to describe the design logic behavior. After synthesis, layout and wiring operations, the function or structure of the chip can be modified. and redefine. FPGA provides a new way for software developers to quickly dev...

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Problems solved by technology

[0004] Existing I2C interface verification controllers for FPGAs lack independent, structured, and integrated design ideas, and are designed mainly according to the specific characteristics of FPGA designs to be verified. In this case, the design of verification controllers is often limited Due to the working mode and structural characteristics of the FPGA design to be verified, the master and slave need to be designed separately, which leads to the diversification and complexity of the external interface signals of the verification controller; the I2C master-slave communication process is not layered and abstracted, resulting in a relatively complex internal hierarchy. Chaotic, difficult to reuse logical structures; master-slave operating mode, data transmission mode, and fixed data transmission length lead to poor reusability of the verification controller and low verification flexibility, resulting in a huge waste of manpower and time resources. I2C interface verification Sufficiency and efficiency are difficult to guarantee

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