Lateral insulated gate bipolar transistor and preparation method thereof
A bipolar transistor, insulated gate technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of weak conductance modulation effect in the drift region, high forward voltage drop, slow turn-off speed, etc. Achieve the effect of optimizing carrier distribution, reducing forward conduction voltage drop, and reducing driving loss
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Embodiment 1
[0059] This embodiment provides a lateral insulated gate bipolar transistor, the half-cell structure of which is as follows figure 2 As shown, the two-dimensional cross-sectional structures obtained along the dotted line AB and dotted line CD in the semi-cellular structure are as follows image 3 and Figure 4 shown. This embodiment includes a P-type substrate 1, a silicon dioxide isolation layer 2, and an N-type drift region 3 arranged in sequence from bottom to top; an N-type buffer zone 4 is arranged on one side of the top layer of the N-type drift region 3 in the longitudinal direction, so The longitudinal direction is the third dimension perpendicular to the horizontal and vertical directions of the device; the N-type buffer zone 4 is provided with an N-type collector region 5, and the upper surface of the N-type collector region 5 is provided with a first metallized collector 6; In the N-type drift region 3, a P-type base region 7 is provided on the side away from the...
Embodiment 2
[0066] This embodiment provides a lateral insulated gate bipolar transistor, the half-cell structure of which is as follows Figure 5 As shown, its two-dimensional cross-sectional view along the dotted line AB in the figure is as follows Figure 6 shown. In this embodiment, on the basis of Embodiment 1, in the first trench gate structure, the vertical direction below the first silicon dioxide layer 11 and the longitudinal direction of the N-type drift region 3 are close to the side of the first silicon dioxide layer 1 A P-type shielding layer 16 is provided, and the doping concentration of the P-type shielding layer 16 is higher than that of the N-type drift region 3; a third gate oxide layer 131 is provided on the upper surface of the P-type base region 8, and the third gate oxide The layer 131 extends vertically above the N-type charge storage region 15 ; a second polysilicon gate electrode 141 is disposed above the third gate oxide layer 131 .
[0067] In particular, the ...
Embodiment 3
[0071] This embodiment provides a lateral insulated gate bipolar transistor, the cell structure of which is as follows Figure 7 As shown, on the basis of Embodiment 1, the polysilicon gate electrode 14 and the second silicon dioxide layer 13 in the longitudinal direction length greater than the N-type emitter region 8 longitudinal direction length of the part toward the N-type emitter region 8 in the horizontal direction The direction extends until the cell boundary.
[0072] In particular, the longitudinal border of the N-type charge storage region 15 coincides with the longitudinal outer border of the second silicon dioxide layer 13 .
[0073] Compared with Example 1, the extended gate is between the collector and the emitter, which can block the flow of carriers during conduction, generate a carrier storage effect, improve the conductance modulation capability of the drift region, and reduce the conduction voltage drop ; At the same time, during forward conduction, the po...
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Abstract
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