Integrated cascade device and preparation method thereof

Abstract

The invention provides an integrated cascade device comprising a SiC JFET and a Si MOSFET and a preparation method of the integrated cascade device. The integrated cascade device comprising the SiC JFET and the Si MOSFET comprises a first epitaxial layer, a second epitaxial layer and an isolation oxide layer, wherein the first epitaxial layer comprises a substrate and a boss arranged in the middleof the upper surface of the substrate; the second epitaxial layers are arranged above the substrate and located on the two opposite sides of the boss in the left-right direction; the isolation oxidelayer is arranged between the first epitaxial layer and the second epitaxial layer; a drain region of the Si MOSFET and a source region of the Si MOSFET extend into the second epitaxial layer from theupper surface of the second epitaxial layer, and a gate region of the SiC JFET and a source region of the SiC JFET extend into the first epitaxial layer from the upper surface of the boss. The process is easy to implement, high in practicability and good in connectivity, and even if problems such as open circuit occur, the problems can be easily found and overhauled in the production process.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an integrated cascaded device and a preparation method thereof. Background technique [0002] Compared with Si materials, SiC materials have the characteristics of high breakdown field strength, high saturation drift velocity, and high thermal conductivity. Therefore, SiC power devices have obvious advantages. In the current field, SiC power devices have the advantages of high withstand voltage, high frequency, good heat dissipation, and miniaturization. However, there are problems with the quality of the gate oxide of commonly used SiC MOSFET power devices, resulting in reduced channel reverse carrier mobility, low gate oxide withstand voltage, and threshold voltage drift, resulting in reliability problems in SiC MOSFET power devices. In view of the above problems, there is a technical scheme of integrating SiC JFETs and Si MOSFETs in cascade, which can solve the above p...

AI Technical Summary

Problems solved by technology

However, there is a problem with the quality of the gate oxide of commonly used SiC MOSFET power devices, resulting in reduced channel reverse carrier mobility, low gate oxide withstand voltage, and threshold voltage drift, resulting in reliability problems in SiC MOSFET power devices.

In view of the above problems, there is a technical scheme of integrating SiC JFETs and Si MOSFETs in cascade, which can solve the above problems, but there are still many deficiencies when SiC JFETs and Si MOSFETs are cascaded, which leads to more difficult processes. Large, the performance cannot be improved further

[0003] Therefore, research on semiconductor power devices needs to be in-depth

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