Embedded chip package and manufacturing method thereof

Abstract

The invention discloses an embedded chip package and a manufacturing method thereof. The chip package includes at least one chip and a frame surrounding the at least one chip, the chip is provided with a terminal surface and a back surface which are separated by the height of the chip, and the height of the frame is equal to or larger than the height of the chip, wherein a gap between the chip andthe frame is completely filled with a photosensitive polymer dielectric material, a terminal surface of the chip is coplanar with the frame, a first wiring layer is arranged on the terminal surface of the chip, and a second wiring layer is arranged on the back surface of the chip. The invention further discloses a manufacturing method of the embedded chip package.

Description

technical field [0001] The invention relates to chip packaging, in particular to embedded chip packaging and a manufacturing method thereof. Background technique [0002] With the vigorous development of the electronic industry, electronic products have gradually entered the era of multi-function, miniaturization and high performance. The increasing demand for high density, multi-function and miniaturization has brought new challenges to both packaging and substrates, and many new packaging technologies have emerged, including embedded packaging technology. [0003] Embedded packaging technology is to embed passive components such as resistors, capacitors, inductors, or even active components such as ICs into the packaging substrate. This approach can shorten the length of the lines between components, improve electrical characteristics, and improve effective Printed circuit board packaging area, reducing a large number of solder joints on the printed circuit board surface,...

AI Technical Summary

Problems solved by technology

[0008] In the case of exposing openings through laser drilling on conventional packaging materials, the energy of the laser is likely to generate stress inside the chip or device, which is likely to cause damage to the chip or device, so it is not suitable for embedding of bare chips / devices without conductive pillars

[0009] In the case of exposing openings by dry etching on conventional packaging materials, it is difficult to achieve small holes, and even for large openings, there are still long work processes, low process output, limited product design, poor uniformity, and short life. shortcoming

In addition, dry etching usually needs to grind and thin the packaging material, and the panel frame is usually made of glass fiber composite material (such as BT), so it has to face the problem of glass fiber exposure after grinding, and the glass fiber exposure will Limit the ability of fine lines, such as poor bonding of copper on glass fibers and easy peeling; and exposed glass fibers are easy to form electromigration channels, resulting in electrical performance failure and reduced lifespan

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