HKMG structure manufacturing method

Abstract

The invention discloses an HKMG structure manufacturing method. The method comprises the following steps of: optimizing a forming sequence of an N-type metal gate region and a P-type metal gate region on a substrate, and sequentially forming a gate oxide layer, a high-K dielectric layer, an optional transition layer, a P-type work function etching stop layer, a P-type work function layer and a pseudo polysilicon gate etching stop layer; performing a pseudo polysilicon gate process on the N-type metal gate region and the P-type metal gate region; removing a pseudo polysilicon gate; opening the pseudo polysilicon gate etching stop layer in the N-type metal gate region; removing the P-type work function layer in the N-type metal gate region; forming an N-type work function layer; and forming a metal gate. According to the method, on the premise that process steps are not increased, the common aluminum diffusion problem in the HKMG process can be effectively controlled, and the number of film layers during P-type metal gate filling is reduced, so that an AL filling window can be effectively increased, metal gate Al filling defects are optimized, and the performance of an HKMG structure device is improved.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a HKMG structure manufacturing method. Background technique [0002] With the development of semiconductor technology, a metal gate (MG) is usually used in the gate structure of a semiconductor device with a high process node, and a high dielectric constant layer (HK) is usually used as a gate dielectric layer, and HK and MG are stacked to form an HKMG structure. The gate structure of HKMG is usually realized by a gate replacement process. That is, the dummy gate structure is firstly formed in the formation region of the gate structure by deposition plus photolithography and etching processes. The dummy gate structure is usually formed by stacking a gate oxide layer and a polysilicon gate, and then side walls are formed on the sides of the dummy gate structure, and source regions are formed on both sides of the dummy gate structure by using a source-drain ion implantation proc...

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Problems solved by technology

[0004] The existing method is to make the P-type work function layer PWF and the N-type work function layer NWF after the dummy gate is removed. Since there are many film layers in the PMG, it is easy to cause Al filling defects in the metal gate, and aluminum diffusion problems are also prone to occur. affect the performance of semiconductor devices

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