Electrostatic protection chip based on power management and preparation method thereof

Abstract

The invention discloses an electrostatic protection chip based on power management, which comprises a substrate, a first epitaxial layer formed on the substrate, a groove extending into the substrate from the first epitaxial layer, a second epitaxial layer filled in the groove, a first injection region which is positioned in the substrate and connected with the first epitaxial layer and the side wall and the bottom of the groove, second injection regions which are formed in the first epitaxial layer and arranged at intervals, a silicon oxide layer formed on the first epitaxial layer and the second epitaxial layer, a polycrystalline silicon layer formed on the silicon oxide layer, a dielectric layer on the polycrystalline silicon layer, a first contact hole which penetrates through the dielectric layer, the polycrystalline silicon layer and the silicon oxide layer and is connected with the second injection regions, a second contact hole which penetrates through the dielectric layer, is connected with the polycrystalline silicon layer and corresponds to the second epitaxial layer, a first metal layer which is formed on the dielectric layer and fills the first contact hole and the second contact hole, and a second metal layer formed on the lower surface of the substrate. The invention further provides a preparation method of the electrostatic protection chip based on power management, the parasitic capacitance is small, the response speed is high, the device area is small, and the working performance of the device is improved.

Description

technical field [0001] The invention belongs to the technical field of semiconductor manufacturing technology, and in particular relates to an electrostatic protection chip based on power supply management. Background technique [0002] As semiconductor devices tend to be miniaturized, high-density, and multi-functional, electronic devices are increasingly susceptible to voltage surges, and even fatal injuries, which can be induced by various voltage surges from electrostatic discharge to lightning For transient current spikes, the transient voltage suppressor (TVS) is usually used to protect the insensing circuit from the impact of the surge. The transient voltage suppressor can protect the circuit by changing the surge discharge path and its own clamping voltage effect. In order to save chip area and obtain higher anti-surge capability, trench TVS is used. The junction surface of trench TVS is formed on the vertical trench sidewall. Under the same chip area, it has more e...

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Problems solved by technology

However, the additional capacitance introduced by these two structures is large, and the device area is

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