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Manufacturing method of gate oxide layer of SiC MOSFET device

A technology of gate oxide layer and fabrication method, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as low channel mobility, achieve high channel mobility, good interface quality, and solve the problem of channel mobility. The effect of lower channel mobility

Pending Publication Date: 2022-03-29
SUZHOU LOONGSPEED SEMICON TECH CO LTD
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Problems solved by technology

[0005] The main purpose of this application is to provide a method for fabricating a gate oxide layer of a SiC MOSFET device and a SiC MOSFET device, so as to solve the problem of low channel mobility of SiC MOSFETs in the prior art

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  • Manufacturing method of gate oxide layer of SiC MOSFET device
  • Manufacturing method of gate oxide layer of SiC MOSFET device
  • Manufacturing method of gate oxide layer of SiC MOSFET device

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Embodiment

[0050] The manufacturing method of the silicon carbide device includes:

[0051] Use the RCA standard cleaning method to clean the surface of the 4H-SiC P-type epitaxial wafer sample, and perform ion implantation on the cleaned 4H-SiCP-type epitaxial wafer including:

[0052] Put the cleaned 4H-SiC P-type epitaxial wafer sample into the high-temperature ion implantation chamber for channel As ion implantation, adjust the temperature to 400°C, and the above-mentioned nitrogen ion implantation dose and energy are: 4.14X10^11cm -2 / 30K, 4.37X10 11 cm -2 / 55K, 4.61X10 11 cm -2 / 80K, 12.1X10 11 cm -2 / 125K; Rinse the treated 4H-SiC P-type epitaxial wafer sample in a mixed solution of 40% HF and water with a volume ratio of 1:10 to remove SiO on the surface 2 layer; put the epitaxial wafer of the processed 4H-SiC P-type epitaxial wafer sample into the reaction chamber of the plasma-enhanced chemical vapor deposition equipment, and deposit SiO with a thickness of 60 nm on the s...

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Abstract

The invention provides a manufacturing method of a gate oxide layer of a SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device. The manufacturing method comprises the steps of providing a SiC substrate and a first oxide layer, wherein the first oxide layer is located on the surface of the SiC substrate; forming a second oxide layer on the surface, far away from the SiC substrate, of the first oxide layer by adopting a high-temperature low-pressure chemical vapor deposition method; and annealing the first oxide layer and the second oxide layer, wherein the first oxide layer and the second oxide layer after annealing form a gate oxide layer. In the method, due to the existence of the first oxide layer, when the second oxide layer is generated, the second oxide layer does not react with the silicon carbide epitaxial wafer, and no redundant by-product is generated, so that the SiC / SiO2 interface quality of the gate oxide layer is relatively good, and the problem of relatively low channel mobility of a SiC MOSFET in the prior art is solved.

Description

technical field [0001] The present application relates to the field of semiconductors, in particular, to a method for fabricating a gate oxide layer of a SiC MOSFET device and the SiC MOSFET device. Background technique [0002] SiC is an important wide-bandgap semiconductor material and has important applications in power semiconductor devices. However, due to the large number of interface states near the conduction band edge, its device field-effect mobility is only 20–50 cm2 / Vs, about 1.5 orders of magnitude lower than its bulk material mobility, which greatly limits the performance of SiC devices. SiC / SiO 2 Interface state density ratio of classical Si / SiO 2 The interface state density is more than 2 orders of magnitude higher. The chemical characteristics of these defects have not yet fully reached a consensus, but a large number of interface state defects become traps that hinder the speed of electron movement, which is one of the reasons for low electron mobility a...

Claims

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Application Information

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IPC IPC(8): H01L21/04H01L21/336H01L29/78
CPCH01L21/049H01L29/66068H01L29/78
Inventor 汪洋张耀辉
Owner SUZHOU LOONGSPEED SEMICON TECH CO LTD
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