Method for measuring depth of defect-free area of monocrystalline silicon wafer
A single crystal silicon wafer and measurement method technology, applied in the direction of optical testing flaws/defects, material excitation analysis, etc., can solve the problems of complicated sample preparation process, large result error, manual counting and measurement, etc., and achieve easy repeatable measurement, measurement The method is simple and precise, and the effect
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Embodiment 1
[0045] This embodiment provides a method for measuring the depth of the defect-free region of a single crystal silicon wafer after oxidation heat treatment, and the measurement method is as follows:
[0046] (1) Starting from either side of the oxidized and heat-treated single crystal silicon wafer, the single crystal silicon wafer within the thickness range of the first 200 μm is divided into 40 layers, and the depth of each layer is 5 μm. The layer is tested for defect density, and the test results are shown in Table 1 below:
[0047] Table 1
[0048]
[0049]
[0050] Among them, when performing the layered defect density test, the layering is carried out according to a test at an interval of 5 μm, and the 0-200 μm thickness range of the oxidized and heat-treated single crystal silicon wafer is divided into 40 layers, and the test depth of each layer is 5 μm, namely The first layer tests the distribution of 0-5 μm defects, the second layer tests the distribution of 5...
Embodiment 2
[0057] This embodiment provides a method for measuring the depth of the defect-free region of a single-crystal silicon wafer after high-temperature annealing treatment. The only difference from Example 1 is that the single-crystal silicon Monocrystalline silicon wafer, other conditions are identical with embodiment 1;
[0058] After testing, 2 defects were found at 10-15 μm, and 15 defects were found at 15-20 μm. In order to confirm the position when the accumulated defects reached 3, the depth interval of 11-16 μm, the depth interval of 12-17 μm, and the depth interval of 13-18 μm were further tested. The layered defect density test was carried out in the depth range of 14-19 μm, and the test results are shown in Table 3 below:
[0059] table 3
[0060] Test depth / μm 11-16 12-17 13-18 14-19 15-20 Number of defects / piece 1 1 4 8 15
[0061] 2 defects were found at 10-15 μm, and 1 defect was found at 11-16 μm, indicating that within the depth rang...
Embodiment 3
[0063] This embodiment provides a method for measuring the depth of the defect-free region of a single crystal silicon wafer after high-temperature annealing treatment. The difference from Embodiment 1 is:
[0064] Replace the single crystal silicon wafer that has been oxidized and heat-treated with the single crystal silicon wafer that has been annealed at high temperature,
[0065] The depth of the defect-free zone is defined as the depth when the cumulative defect reaches 1 piece;
[0066] Other conditions are identical with embodiment 1;
[0067] After testing, 0 defects were found at 5-10 μm, and 12 defects were found at 10-15 μm. In order to confirm the position of the first defect, the depth interval of 6-11 μm, the depth interval of 7-12 μm, the depth interval of 8-13 μm and the depth of 9 The layered defect density test was carried out in the depth range of ~14 μm, and the test results are shown in Table 4 below:
[0068] Table 4
[0069] Test depth / μm 6-1...
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