Semiconductor device and preparation method thereof
A semiconductor and device technology, applied in the field of semiconductor devices and their preparation, can solve problems such as reducing gate resistance, affecting device frequency characteristics, increasing gate parasitic capacitance, etc., to reduce gate resistance, increase cross-sectional area, and reduce parasitic The effect of capacitance
Pending Publication Date: 2022-05-31
DYNAX SEMICON
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Abstract
The embodiment of the invention discloses a semiconductor device and a preparation method thereof, the semiconductor device comprises a substrate, a multi-layer semiconductor layer, a dielectric layer, a grid electrode, a source electrode and a drain electrode, the dielectric layer at least comprises a first dielectric layer close to the substrate and a second dielectric layer far away from the substrate; a gate trench is formed in the dielectric layer, the gate trench at least comprises a first sub-trench penetrating through the first dielectric layer and a second sub-trench penetrating through the second dielectric layer, and the vertical projection of the second sub-trench on the substrate covers the vertical projection of the first sub-trench on the substrate; the grid electrode at least comprises a first grid electrode part, a second grid electrode part and a third grid electrode part which are connected with one another and arranged in a laminated mode, the first grid electrode part fills the first sub-groove, the second grid electrode part fills the second sub-groove, and the vertical projection of the third grid electrode part on the substrate covers the vertical projection of the second grid electrode part on the substrate. The grid electrode of the semiconductor device has low resistance and low parasitic capacitance at the same time, and has good high-frequency characteristics.
Application Domain
Semiconductor/solid-state device manufacturingSemiconductor devices
Technology Topic
PhysicsParasitic capacitor +6
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