Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Preparation method of CMOS phase inverter based on GaOx-PMOS/GaN-NMOS

A channel layer and photoresist technology, applied in the field of materials, can solve the problems of high power consumption of the inverter, poor heat dissipation, and impact on device performance, and achieve the effect of improving performance, simple structure, and good heat dissipation

Pending Publication Date: 2022-07-08
SHENZHEN UNIV
View PDF0 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, the existing inverters have high power consumption, complex manufacturing process, complex circuits, poor heat dissipation, and the maximum on-state current density is limited to tens of mA / mm. The size of the device is relatively large, and the production process of the device usually requires plasma Body etching will have a relatively large impact on device performance

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Preparation method of CMOS phase inverter based on GaOx-PMOS/GaN-NMOS
  • Preparation method of CMOS phase inverter based on GaOx-PMOS/GaN-NMOS
  • Preparation method of CMOS phase inverter based on GaOx-PMOS/GaN-NMOS

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0025] In order for those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0026] An embodiment of the present invention provides a GaO-based x -The preparation method of the CMOS inverter of PMOS / GaN-NMOS, comprises the following steps:

[0027] Step 1. Grow a carbon-doped or silicon-doped GaN buffer layer on a single crystal Si substrate or a GaN substrate, use photoresist to block the area on one side of the carbon-doped GaN buffer layer, and epitaxially grow Mg-doped GaN on the other side Form the n-MOS channel layer, remove the photoresist on one side, block the surface of the n-MOS channel layer, and epitaxially grow GaO on the surface where the photoresist is removed x forming a p-MOS channel layer;

[0028] In this embodiment, as fig...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
lengthaaaaaaaaaa
Login to View More

Abstract

The preparation method comprises the following steps: growing a carbon-doped or silicon-doped GaN buffer layer on a single crystal Si substrate or a GaN substrate, blocking a region on one side of the carbon-doped GaN buffer layer by using photoresist, epitaxially growing Mg-doped GaN on the other side to form an n-MOS channel layer, removing the photoresist on one side, blocking the surface of the n-MOS channel layer, and forming an n-MOS channel layer on the surface of the n-MOS channel layer; epitaxial growth of GaOx is carried out on the surface of which the photoresist is removed so as to form a p-MOS channel layer; performing vertical photoetching at critical positions of the n-MOS channel layer and the p-MOS channel layer, and growing a high-thermal-conductivity substance in a formed isolation region to form a barrier layer; photoresist is used for blocking, Si is injected into the two ends of the surface of the n-MOS channel layer through ions to form an n region, and Mg is injected into the two ends of the surface of the p-MOS channel layer through ions to form a p region; etching a part of the insulating layer in two end regions of the n-MOS channel layer and the p-MOS channel layer and in a barrier layer region, depositing a metal film, stripping and annealing to respectively obtain a source electrode and a drain electrode, and stripping and annealing on the insulating layer in the regions of the n-MOS channel layer and the p-MOS channel layer to form a grid electrode.

Description

technical field [0001] The embodiments of the present invention relate to the technical field of materials, and in particular, to a preparation method of a GaOx-PMOS / GaN-NMOS-based CMOS inverter. Background technique [0002] In recent years, GaN and Ga 2 O 3 Identified as one of the most important semiconductors for power applications, they all have relatively large band gaps and breakdown electric fields, enabling high voltage, high current, and stable device operation. Inverters with GaN / AlGaN heterojunctions have attracted great attention and are widely used because of their excellent performance. The main features of this type of inverter are: high switching speed, small parasitic inductance; High pressure and other places. [0003] However, the existing inverters have high power consumption, complex fabrication processes, complicated circuits, poor heat dissipation, and the maximum on-current density is limited to several tens of mA / mm. The size of the device is rel...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8258H01L27/092
CPCH01L21/8258H01L27/092
Inventor 刘新科陈增发黄正李博蒋忠伟马正蓊黄双武朱德亮黎晓华徐平
Owner SHENZHEN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products