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Pipelined-SAR ADC and method for eliminating influence of reference voltage fluctuation

A reference voltage and voltage amplifier technology, applied in electrical components, electrical signal transmission systems, physical parameter compensation/prevention, etc., can solve the problems of ADC linearity and accuracy deterioration, and achieve chip area saving, high linearity and accuracy Effect

Active Publication Date: 2022-07-15
成都铭科思微电子技术有限责任公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The purpose of the present invention is to provide a Pipelined-SAR ADC and method for eliminating the influence of reference voltage fluctuations. The Pipelined-SAR ADC innovates on the traditional pipelined successive approximation register analog-to-digital converter, and does not use decoupling capacitors. In some cases, through the special design of the capacitor array and the reference voltage connection method, the problem of "the deterioration of ADC linearity and accuracy due to fluctuations in the reference voltage related to the input signal" is solved, which ultimately saves chip area and enables Pipelined -SAR ADC achieves high linearity and precision;

Method used

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  • Pipelined-SAR ADC and method for eliminating influence of reference voltage fluctuation

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Embodiment 1

[0042] The invention designs a Pipelined-SAR ADC that eliminates the influence of reference voltage fluctuations. The Pipelined-SAR ADC is innovative on the traditional pipeline successive approximation register type analog-to-digital converter. The special design of the capacitor array and the reference voltage connection method solves the problem of "deterioration of ADC linearity and accuracy due to fluctuations in the reference voltage related to the input signal", which ultimately saves the chip area and enables the Pipelined-SAR ADC to achieve High linearity and precision, especially the following setting methods: including the first group of reference voltage Vref1, the second group of reference voltage Vref2, the sample and hold circuit, the first stage SAR ADC, the second stage SAR ADC, digital logic, switch S3 and the residual voltage amplifier, the first set of reference voltages Vref1 is connected to the high-stage capacitor array side on the first-stage CDAC of t...

Embodiment 2

[0044] This embodiment is further optimized on the basis of the above-mentioned embodiment, and the same parts as the above-mentioned technical solutions will not be repeated here, and further to better realize a Pipelined-SAR that eliminates the influence of reference voltage fluctuations described in the present invention The ADC, in particular, adopts the following setting method: the first group of reference voltages Vref1 and the second group of reference voltages Vref2 are connected to the same lead-in terminal of the selection switch side of the high-stage capacitor array through switch S2 through switch S1, and the selection The switch is respectively connected to the sample-hold circuit and the ground level through the other two lead-in terminals, the control terminal of the selection switch is connected to the first-stage CDAC capacitance control signal output by the digital logic, and the lead-out terminal of the selection switch is connected to the corresponding T...

Embodiment 3

[0046] This embodiment is further optimized on the basis of any of the above-mentioned embodiments, and the same parts as the above-mentioned technical solutions will not be repeated here. Further, in order to better realize the Pipelined method of the present invention that eliminates the influence of reference voltage fluctuations -SAR ADC, in particular, the following setting method is adopted: the sample-and-hold circuit is controlled by the control signal Clk_samp generated by digital logic.

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Abstract

The invention discloses a Pipelined-SAR ADC and method for eliminating influence of reference voltage fluctuation, and the Pipelined-SAR ADC comprises a first group of reference voltage Vref1, a second group of reference voltage Vref2, a sampling holding circuit, a first-stage SAR ADC, a second-stage SAR ADC, a digital logic, a switch S3 and a residual voltage amplifier, the first group of reference voltage Vref1 is connected to a high-section capacitor array side of a first-stage CDAC of the first-stage SAR ADC through a switch S1, and the second group of reference voltage Vref2 is connected to a second-stage CDAC of the second-stage SAR ADC through a digital logic. The second group of reference voltage Vref2 is also connected to the high-section capacitor array side on the first-stage CDAC of the first-stage SAR ADC through the switch S2, both the switch S1 and the switch S2 are controlled by digital logic signals, and the method for eliminating the influence of the reference voltage fluctuation is realized on the Pipelined-SAR ADC.

Description

technical field [0001] The invention relates to the fields of integrated circuit technology and the like, and in particular, relates to a Pipelined-SAR ADC and a method for eliminating the influence of reference voltage fluctuations. Background technique [0002] With the continuous development of digital signal processing technology and semiconductor manufacturing technology, advanced electronic systems have emerged to meet the needs of various applications, which has also brought an urgent need for high-precision analog-to-digital converters (ADCs). Pipelined successive approximation register analog-to-digital converters (Pipelined-SAR ADCs) are widely used due to their high energy efficiency, high speed, high linearity and high precision. [0003] The traditional pipeline successive approximation register-based analog-to-digital converter (Pipelined-SAR ADC) consists of two SARADCs, a residual voltage amplifier and two sets of reference voltages (for easy distinction, nam...

Claims

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Application Information

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IPC IPC(8): H03M1/08H03M1/46
CPCH03M1/08H03M1/466
Inventor 潘波杜翎
Owner 成都铭科思微电子技术有限责任公司
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