Polishing pad and polishing device

A polishing pad and polishing layer technology, which is applied in the direction of grinding devices, electrical components, circuits, etc., can solve the problems that are not fully resolved, the surface flatness of the semiconductor substrate is poor, and the bending tracking of the semiconductor substrate is poor.

Inactive Publication Date: 2002-01-09
TORAY IND INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

First of all, even if the bulk modulus of the polishing layer is larger than that of the buffer layer, sometimes the flatness of the local unevenness on the surface of the semiconductor substrate is poor, and the local flatness is not necessarily the same as the bulk modulus of the polishing layer. There are relationships
Second, since the bulk modulus of the buffer layer is 250 psi / psi in the stress range of 4 psi to 20 psi, the bending tracking of the entire surface of the semiconductor substrate is poor, and as a result, the uniformity (uniformity) of the entire surface of the semiconductor substrate cannot be obtained sufficiently.
Moreover, as described in "CMP Science" p177-p183 published by the Science Research Forum (サイエンスフオ-ラム) of the company, there is no question of how close to the edge in the wafer plane the necessary planarization is to be performed. Fully resolved
Third, when the rotation speed of the polishing table is increased to a high speed, the flatness is good, but the bending tracking of the entire surface of the semiconductor substrate is deteriorated

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0068] A foamed polyurethane sheet with a thickness of 5 mm (microrubber A hardness = 50 degrees, density; 0.77, average diameter of independent cells: 110 μm) was immersed in methyl methacrylate to which 0.1 parts by weight of azobisisobutyronitrile was added 24 hours. The foamed polyurethane sheet swollen with methyl methacrylate was sandwiched between glass plates and heated at 70° C. for 24 hours. After heating, it took out from a glass plate, vacuum-dried at 50 degreeC, and this was cut, and the polished layer of thickness 1.2mm was obtained. The microrubber A hardness of this polishing layer was 98 degrees, the density: 0.79, the average closed cell diameter: 150 μm, and the content ratio of polymethyl methacrylate was 69% by weight. Use Nitto Denko's double-sided adhesive tape No.591 (tensile modulus of elasticity below 0.1Mpa) to place 1mm of nitrile rubber (bulk modulus of elasticity = 140Mpa,; tensile modulus of elasticity = 4.5MPa) buffer layer Paste with the poli...

Embodiment 2

[0070] The polypropylene glycol of 30 parts by weight and the diphenylmethane diisocyanate of 40 parts by weight and the water of 0.8 parts by weight and the triethylamine of 0.3 parts by weight and the silicon defoamer of 0.3 parts by weight and the tin octoate of 0.9 parts by weight utilize RIM forming machine mixes, presses into the mold, press molding, makes the foamed polyurethane sheet material of thickness 1.5mm (hardness of microrubber A=50 degree, density; 0.51, the average diameter of independent cell: 40 μm). This foamed polyurethane was immersed in methyl methacrylate to which 0.1 parts by weight of azobisisobutyronitrile was added for 15 hours. The foamed polyurethane sheet swollen with methyl methacrylate was sandwiched between glass plates and heated at 70° C. for 24 hours. After heating, it was taken out from the glass plate, vacuum-dried at 50° C., and both sides of the obtained hard foam sheet were cut to prepare a polishing pad with a thickness of 1.2 mm. T...

Embodiment 3

[0073] 78 parts by weight of polyether-based polyurethane polymer (Aciprene L-325 manufactured by Yuniro-Al Corporation), 20 parts by weight of 4,4'-methylene-bis-2-chloroaniline and 18 parts by weight of hollow polymer Microspheres (Expancell 551 DE manufactured by Kemano-Bell Co., Ltd.) were mixed with a RIM molding machine, and pressed into a mold to form a polymer molded body. This polymer molded body was sliced ​​to a thickness of 1.2 m using a microtome to obtain a polished layer. Micro rubber A hardness of the polishing layer=98 degrees, density: 0.80, average independent cell diameter: 33 μm). With 1mm neoprene (bulk modulus=100Mpa, tensile modulus=12MPa) as buffer layer, utilize Sumitomo 3M (strain) double-sided adhesive tape Y-949 (tensile modulus is 10Mpa) and The polishing layers are pasted to each other to make a polishing pad. Using a silicon dioxide-based polishing agent, the oxide film polishing rate was evaluated under the evaluation condition C of the plate...

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PUM

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Abstract

The present invention relates to a polishing pad which is characterized in that it has a polishing layer of rubber A-type microhardness at least 80 DEG and a cushioning layer of bulk modulus at least 40 MPa and tensile modulus in the range 0.1 MPa to 20 MPa, and to a polishing device which is characterized in that a semiconductor substrate is fixed to the polishing head, and an aforesaid polishing pad is fixed to the polishing platen so that the polishing layer faces the semiconductor substrate, and by rotating the aforesaid polishing head or the polishing platen, or both, the semiconductor substrate is polished. With the polishing device or polishing pad of the present invention for use in the mechanical planarizing process wherein the surface of the insulating layers or metal interconnects formed on a semiconductor substrate are smoothened, it is possible to uniformly planarize the entire semiconductor face and perform uniform polishing close up to the wafer edge and, furthermore, it is possible to provide a technique for achieving both uniformity and planarity under conditions of high platen rotation rate.

Description

[0001] technology area [0002] The present invention relates to a polishing device and a polishing pad for a semiconductor substrate, and more particularly to a polishing device and a polishing pad for mechanically flattening the surface of an insulating layer and the surface of a metal wiring formed on a semiconductor substrate such as silicon. Background technique [0003] With the year-by-year integration of large-scale integrated circuits (LSI) represented by semiconductor memory, the manufacturing technology of large-scale integrated circuits is also developing towards high density. Furthermore, along with such densification, the number of layers of semiconductor devices is also increasing. As the number of layers is increased, unevenness of the main surface of the semiconductor substrate caused by layering, which was not a problem until now, becomes a problem. For example, "Nikkei Microdevices" (Nikkei Microdevices) July 1994, pp. 50-57, discusses how to make up for th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B24B37/00B24B37/20B24B37/22B24B37/24B24D13/14
CPCB24B37/24Y10S438/959H01L21/304
Inventor 城邦恭南口尚士冈哲雄
Owner TORAY IND INC
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