Multilayer device and its producing method

A device and component technology, applied in the field of packaging solutions for monolithic integrated systems, can solve problems such as unusable devices and incompatibility, and achieve the effect of improving reliability and quality

Inactive Publication Date: 2004-09-29
森松诺尔公司
2 Cites 2 Cited by

AI-Extracted Technical Summary

Problems solved by technology

However, there are issues with this approach, such as the sheet resistance achievable with buried conductors, parasitic capacitance associated with the depletion region surrounding buried conductors, polarity and...
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Method used

[0050] For each system 121 to be packaged, there may be one or more conductive paths from the anodic bonding metal layer 105 to the substrate 103. If step-and-repeat systems are used, each system has at least one conductive path. If a proximity machine is used for the photolithography process, the electrical contact down to the substrate can only be at one place on ...
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Abstract

A method for producing a multi-layer device. The method initially providing a substrate which comprises a support region for supporting an electrical component, then forming an electrically conductive bond layer on a surface of the substrate. The bond is configured to surround the region for supporting the component. The next step in the method is to provide an encasing layer in contact with the bond layer, such that the component is encased between the substrate and the encasing layer. The final step involves bonding the encasing layer to the bond layer to form a sealed cavity which encloses the component. Further, a multi-layer device is provided. The device comprises a substrate, at least one electrical component which is located on the substrate, an electrically conductive bond layer and an encasing layer. The bond layer is formed on the substrate and surrounds the electrical components and the encasing layer is bonded to the bond layer to form a sealed cavity encasing the components therein.

Application Domain

Semiconductor/solid-state device detailsSolid-state devices +4

Technology Topic

Electrically conductiveMaterials science

Image

  • Multilayer device and its producing method
  • Multilayer device and its producing method
  • Multilayer device and its producing method

Examples

  • Experimental program(1)

Example Embodiment

[0036] figure 1 a) A cross-sectional view of the pre-processed silicon wafer 100 is shown. The passivation layer 101 may be composed of a first layer of phosphosilicate glass (PSG) plus a layer of silicon nitride (SiN)—other combined layers may also be used. Post-processing may include patterning of each layer in the passivation layer individually or simultaneously. The factors governing this process will be cost and technical issues, such as the ease or feasibility of pollutant control and post-treatment. The main function of the passivation layer is to prevent sodium contamination of the underlying circuit. The aluminum contact pad 102 is shown, but in order to improve the clarity of the drawing, the underlying conductive and dielectric layers are not included. The passivation layer 101 and the contact pad 102 are formed on the substrate 103.
[0037] The first process step performed on the wafer 100, such as figure 1 b) shows the deposition of the first layer of positive photoresist 104 on the wafer 100 and the patterning of the photoresist using traditional photolithography techniques. The function of this first layer of photoresist 104 is to protect the aluminum contact pad 102 in the subsequent process steps.
[0038] The metal bonding layer 105 can then be deposited on the entire wafer 100. The thickness of the metal bonding layer 105 depends on the type of metal selected and the deposition method used for the metal. The metal layer must have sufficient thickness to conduct the bonding current during the anodic bonding process. However, in order to optimize the bonding strength, the metal layer 105 must have a low surface roughness, which limits the thickness of the metal layer. The metal layer is preferably, but not limited to, a layer of titanium or aluminum. A layer of positive photoresist 106 is spin-coated on the bonding layer 105 and patterned using traditional photolithography techniques, see figure 1 c). This second layer of photoresist 106 is used as a mask in the subsequent etching process of the metal bonding layer 105.
[0039] Such as figure 1 As shown in d), the corrosion of the anodic bonding metal layer 105 is preferably performed by a selective etching process, so that it does not corrode the passivation layer 101. The anodic bonding frame 107 and the conductor wire 122 required for anodic bonding are patterned in this etching step.
[0040]Then the photoresist layers 104 and 106 are stripped off. The photoresist layer used in the first 104 and second 106 photolithography processes need not be the same material. Both photoresist layers are preferably removed in a photoresist solvent, such as acetone. In addition to using a photoresist solvent, or as an alternative, certain parts of the photoresist used in the first photolithography process can be removed in a plasma asher. Finally, scum removal can be performed to remove film residues.
[0041] After removing all the photoresist layers, the wafer 100 can be used for anodic bonding to a glass sheet or a silicon wafer covered with a thin glass film, see figure 1 e).
[0042] Alternatively, a stripping process with glue can be used instead figure 1 Introducing the patterning of anode bonding metals. By using negative photoresist, edges with overhanging contours can be obtained. When metal is deposited on such an overhanging profile, if a sufficient gap is created between the metal to be stripped and the remaining metal, then the glued glass process can be directly performed after the metal is deposited. If the photoresist cannot form the overhanging profile, and there is no sufficient gap, then the photolithography process can ensure the formation of the gap again.
[0043] Multi-layer devices can be formed simultaneously from a single substrate, such as figure 2 Shown. On the substrate 103 and in the bonding layer 105, a continuous metal grid 120 with a bonding frame 107 for anodic bonding is formed. A metal bonding frame 107 surrounds each system 121 to be packaged, and the bonding frame is interconnected with metal wires 122. The connecting metal line 122 can be cut along the scribe line 123 in the subsequent slicing process. There are several connecting metal wires 122 for each bonding frame 107 to ensure electrical contact during the anodic bonding process. The size of the wires in the metal grid 120 is determined based on the total amount of current expected to pass through the metal grid during the bonding process.
[0044] figure 2 An alternative to the layout rules presented in is to cover the entire surface with metal, except for those areas that should not be connected together. For this layout rule, there is also the option of drawing metal lines on the scribe line. However, it is preferable to keep most of the scribe line 123 free of metal.
[0045] The system 121 to be packaged is located in the bonding frame 107, such as image 3 Shown. The electrical contact pad 131 is located outside the bonding frame 107 and is used for electrical contact with external connections. An electrical feedthrough 132 connecting the outer contact pad 131 and the inner system 121 is shown. The electrical feedthrough 132 passing under the bonding frame 107 is composed of connected metal bolts 133 and metal wires 134 patterned during the preprocessing of the wafer 100. In this embodiment, the electrical connection 132 is made of metal, resulting in a low series resistance. The electrical connection 132 is insulated by a layer 135 of dielectric material. The thickness of the dielectric layer 135 depends on the process, but the layer is usually 2-3 μm thick. The thick dielectric layer results in a low parasitic capacitance value.
[0046] The glass sheet 136 having a polished surface is patterned using a hard or soft mask and wet etching. If required by the system 121 to be packaged, a cavity is etched in the glass sheet. After removing the hard or soft mask, the glass sheet 136 is ready for anodic bonding. As an alternative to wet etching, glass can be constructed using dry etching, laser drilling, or sandblasting. For some types of sensors, a metal layer is required on the glass sheet. The metal layer can be deposited or patterned on the structured or unstructured glass sheet before anodic bonding.
[0047] The substrate 103 and the glass sheet 136 can be anodically bonded and packaged in a wafer size. The electrical contact during the anodic bonding process with the metal bonding frame 107 can be achieved in several schemes. The metal bonding frame 107 is patterned in the anodic bonding metal layer 105 on the top of the pretreatment substrate 100.
[0048] In a certain scheme (not shown), the anodic bonding metal grid with the bonding frame 107 is directly in electrical contact on the edge of the metal grid. A small part of the glass sheet 136 must be cut off in order to achieve this scheme smoothly. It is assumed that the glass sheet 136 originally had the same diameter and shape as the substrate 103. The metal grid may or may not be electrically insulated from the substrate during the anodic bonding process.
[0049] In the alternative, such as image 3 As shown, in the anodic bonding process, the anodic bonding metal grid may not directly contact, but there is a conductive path between the anodic bonding metal and the substrate, see image 3 a) and 3b). The conductive path goes down the metal line 137 and the metal plug 138 through the dielectric layer 135 between the anode bonding metal layer 105 and the substrate 103, such as image 3 c) as shown. During the anodic bonding process, the substrate is contacted on its backside 139, see image 3 d).
[0050] For each system 121 to be packaged, there may be one or more conductive paths leading from the anode bonding metal layer 105 to the substrate 103. If a step and repeat lithography system is used, then each system has at least one conductive path. If a proximity lithography machine is used for the lithography process, the electrical contact down to the substrate can be located in only one place on the wafer, because the metal grid is assumed to be continuous. However, it is recommended to use a certain number of conductive paths evenly distributed on the wafer 100 to reduce the risk of the electrical contact between the metal grid 120 and the substrate 103 being interrupted. If not every system 121 to be packaged requires a conductive path, space can be saved.
[0051] In addition to the glass sheet 136 bonded to the front side of the substrate, or as an alternative to the glass sheet 136, another glass sheet (not shown) may be anodically bonded on the back side 139 of the substrate. This glass sheet can be directly anodically bonded to the silicon surface on the backside 139 of the substrate. If the glass sheet 136 is not bonded to the front surface of the substrate, the electrical contact with the substrate for anodic bonding to the backside can be directly made. However, electrical contact between the anodic bonding metal 107 and the substrate 103 is required. If direct electrical contact with the substrate is not possible due to the presence of the glass sheet, then a small piece of one of the glass sheets, assuming initially the same size and shape as the silicon wafer, can be removed. A small piece of one of the glass sheets can be removed by cutting before anodic bonding. Then, in the anodic bonding process, a probe can be used to contact the substrate where the glass is removed to form an electrical contact.
[0052] The unfavorable environment generated during the anodic bonding process is harmful to the internal components 121 of the device. The present invention proposes three methods to shield the electric field generated during the bonding of the electronic component and the anode, and they can be carried out without adding additional process steps.
[0053] Two of these methods are based on patterning the metal layer on the substrate 103. One method is to pattern the anode bonding metal layer 105 so that it covers the electronic component 121, such as Figure 4 Shown. Then the anodic bonding metal layer should be electrically connected to the silicon substrate 103, so that the electronic component will not be exposed to a large electric field during the anodic bonding process. The second method uses one of the metal layers 134 of CMOS or BiCMOS process as a shielding layer, such as Figure 5 Shown. The shielding layer should be patterned so that it covers the electronic components 121. The electrical connection between the shielding metal layer and the silicon substrate 103 can be formed in standard CMOS and BiCMOS processes. The fill factor of the shielding layer must be high enough to form an effective shield around the electronic components.
[0054] The third method is to add a metal layer 140 on the glass sheet 136 and pattern it, such as Figure 6 Shown. The metal should cover the electronic component 121 and be electrically connected to the silicon substrate 103. Whenever electrical contact between the metal wires on the glass sheet 136 and the metal wires on the substrate 103 is required, it is sufficient to use a pressure contact. Using the prior art, press contact can be achieved by overlapping the metal wires on the glass sheet 136 with the substrate 103 in a certain area during the anodic bonding process. The total thickness of the crossing wires should be slightly larger than the air gap sealed during the anodic bonding process. The wire is then extruded during the anodic bonding process. When the natural oxide layer on the metal wires is removed by pressing, low contact resistance can be obtained and close contact between the metal wires can be obtained.
[0055] Figure 7 a) Show how the present invention can provide additional protection by shielding. Outside the bonding frame 107 on each packaging system 121, there may be a metal protection ring (not shown). The purpose of the metal guard ring is to protect the packaging system 121 in the guard ring from contamination, including ion contamination. The metal guard ring may be formed of a region in the metal layer 134 and the electric shield 133. The shield does not need to form a continuous loop, but two rows of offset columns, such as Figure 7 b) as shown. The metal shield can be fixed to the silicon, or it can move vertically through the dielectric and metal layers. The top of the guard ring can be covered with a passivation layer 100.
[0056] Outside the guard ring on each packaging system, there may be corrosion grooves. The purpose of this corrosion groove is to prevent cracking and delamination of the package system during the cutting process.

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Description & Claims & Application Information

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