Nonvolatile semiconductor memory device having excellent charge retention and manufacturing process of the same

Abstract

There has been a problem in conventional Si-type floating-gate type nonvolatile semiconductor memory devices that the charge retention characteristic is low due to insufficiently large electron affinity of Si, therefore improvement of the memory performances, such as scaling down of a memory cell and increasing operation speed, have been difficult to be achieved due to the essential problem. In order to solve the above problem, in the nonvolatile semiconductor memory device of the present invention, a material having large work function or large electron affinity or a material having a work function close to that of semiconductor substrate or of a control gate, is employed for a floating gate retaining charges. Further, an amorphous material having small electron affinity for an insulating matrix is used. Further, at a time of deposition of charge retention layer, the supply ratio of the nano-particle material and the insulating matrix material, such as the mixture ratio of materials of both phases in a target in a sputtering method, is adjusted. By these methods, the charge retention characteristic of the floating-gate type nonvolatile semiconductor memory device can be improved, and the above-mentioned problem of the nonvolatile semiconductor memory device can be solved.

Description

BACKGROUND OF THE INVENTION FIELD OF THE INVENTION [0001] The present invention relates to a nonvolatile semiconductor memory device and its manufacturing process. In particular, the present invention relates to a structure in which particles with nano-scale consisting of at least one type of single-element substance or its compound are densely distributed in an insulating matrix. Further, the present invention relates to a nonvolatile semiconductor memory device having a charge retention layer with excellent retention characteristic by optimizing the work function or the electron affinity between the nano-particles and the insulating matrix, and by optimizing the distances between surfaces of adjacent nano-particles, and its manufacturing process realizing low cost and good reproducibility. DISCUSSION OF BACKGROUND [0002] Heretofore, as a recording medium in which a large amount of data can be memorized and rewritten, a memory device employing a semiconductor such as DRAM or SRAM, ...

AI Technical Summary

Benefits of technology

The present invention provides a nonvolatile semiconductor memory device with a high charge retention characteristic, which is important for improving the performance of nonvolatile memories. The charge retention layer of the device contains conductive nano-particles or a combination of conductive nano-particles and an insulating matrix. The insulating matrix is amorphous and has an electron affinity of at most 1.0 eV. The work function of the conductive nano-particles is at least 4.2 eV. The difference between the work function of the nano-particles and the work function of the semiconductor substrate or the control gate is at most 0.5 eV. The distance between surfaces of the nano-particles adjacent to each other is from 1 to 5 nm. The insulating matrix is made of at least one chemical compound selected from the group consisting of an oxide, a carbide, a nitride, a boride, a silicide, and a fluoride. The process for manufacturing the nonvolatile semiconductor memory device includes forming the charge retention layer in a self-organizing manner by physical vapor deposition of each material. The nonvolatile semiconductor memory device has improved charge retention, high integration, and data writing and erasing operations.

Problems solved by technology

This problem causes various problems in the characteristic of the above-mentioned nonvolatile memory devices, such that miniaturization or high integration of the devices is difficult and that the improvement of the speed of data-writing operation or data-erasing operation is difficult.

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