Integrated circuit wafer packaging system and method

Abstract

A packaging system, hereinafter referred to as the Critical Packaging System, relates to critical issues that associate with sensitive articles such as IC wafers before, during and after shipment phases. The system employs a choice of two or more specialty designed containers, and any one selected design having choices of two or more methods by which to avoid, reduce and / or eliminate wafer damage from breakage, scratches and / or corrosion during shipment phases. For the purpose of maximizing product yield during packaging phases a special apparatus is used to insert wafers within containers without scratch damage. The following programs are used in packaging: (1) Quality Assurance / Certification, (2) Critical Factor Monitoring, and (3) a Recycle and Refurbish Program. These programs are specifically designed to achieve new levels of product yields, reduce product cost, and landfill impact.

Description

FIELD OF THE INVENTION [0001] The invention relates to semiconductor wafer packaging and transportation system, and more particularly to a packaging system and method of packaging sensitive articles such as semiconductor wafers to prevent damage to the wafers before, during and after storage / shipment phases. BACKGROUND OF THE INVENTION [0002] To date, the semiconductor industry has been able to produce IC wafers increasing functional capabilities and increasing density without necessarily suffering losses during the transport processes, or at least having not realized the packaging media as a source for those losses. In general, present day transport media designed for packaging IC wafers are lacking the necessary features to address several problems common to advanced technology wafers during insertion and transport. This is especially true for 21st Century wafers higher speed with smaller geometries (and having elevated interconnect members including bond pads, caps, and balls. Th...

AI Technical Summary

Benefits of technology

[0021] The primary object of this invention is to provide a system to those having quality responsibility for packaging IC wafers within containers, from which choices can be made depending upon needs and requirements including economic, to correct critical problems that occur during shipment and / or storage, resulting in enhanced yields.

[0023] Another object of the CP System invention is for packaging IC wafers within special containers which may have different configurations to accommodate different packaging requirements and special moisture barrier bags having combined features to optimize product yields during shipment phases. The CP System invention, as defined herein, provides a choice of specially designed containers from which to make a selection to address critical issues that become major problems for wafers during shipment phases. The selection within the concepts of the CP System is made to suit the critical issues by which to optimize yields of packaged wafers. A bag, in combination with a container of choice becomes the system for stripping moisture vapors from interior walls of both enclosures. In accordance with this invention, said container selection addresses at least three or more critical issues that cause damage to packaged wafers during shipment phases and said damages are but are not limited to: 1) corrosion, 2) breakage 3) scratches, (4) structural, (5) improper packaging and (6) particle contamination. The key component of the CP System invention is that all containers in combination with bags have the common design to minimize forces that create motion causing surface damage and minimize moisture vapors causing corrosive damage during shipping phases. Moreover, the features of the Critical Packaging System are specifically designed for the IC Wafers that have much smaller geometries with much faster speeds that require a different packaging methodology to address and correct critical issues during shipment phases. Therefore, the selection of the container in accordance with this invention is tailored to optimize the desired level of wafer protection during shipment.

[0024] A further object of the invention is to provide a selection of at least two or more different and distinctly designed wafer shipping containers combined with two or more means / apparatuses by which said selection accommodates the objectives of CP System at a level that corrects critical problems and optimize the protection of packaged wafers during shipment phases. For an example, one variable design of the container utilized in the CP System in at lease one embodiment includes a special moisture barrier bag that becomes a total enclosure within the container, which in combination avoids damage problems caused by AMCs, oxidation, breakage and scratches during packaging and shipping phases.

[0025] Another object of the invention is to provide methods within the Critical Packaging System that become the means to absorb or abate corrosive AMCs that decrease the quality of bond pad surfaces, reduce bond pad oxidation to increase bonding quality, restrict lateral motion of packaged wafers to decrease scratched surfaces and absorb shock energy to decrease breakage damage resulting in increased product yields.

[0026] Another object of the invention is to provide a moisture barrier bag to hold said container and whereby said bag has a septum that communicates directly with a matching inlet valve on said container. This is the means to introduce a dry gas through film walls of said bag directly into the container interior by which becomes the means to strip moisture vapors. The moisture barrier bag that can be sealed after venting said stripped vapors from a container and becomes a means to enhance bonding ability for wafers packaged therein.

[0029] The above mentioned objects are means and methods that may be used in various combinations to provide a one shipping container of choice that in combination with a shipping bag has the combined features to eliminate forces caused by handling, to eliminate or seriously minimize motion between wafer surfaces during shipment phases, while simultaneously eliminating or seriously minimizing corrosive AMCs and moisture vapors that corrode and oxidize bond pads in combination with the ability to absorb shock energy that breaks wafers caused by mishandling during the shipment phases.

Problems solved by technology

In general, present day transport media designed for packaging IC wafers are lacking the necessary features to address several problems common to advanced technology wafers during insertion and transport.

These problems can manifest themselves in the form of disfigured connectors that include wafer breakage, scratch damage as well as mobile ion induced parametric failures.

Wafer shipping containers / boxes in combination with bags, outer cardboard type boxes, cushions and separators that are not functionally coordinated nor objectively systematized to address wafer movement, Airborne Molecular Contaminants (AMCs), and vapor leakage during transport can cause yield problems to the semiconductor wafers.

The resulting wafer movement, when combined with wafers that utilize soft thin protective overcoats and elevated soft pads, caps and / or ground rings, can result in scratching during the wafer insertion and transport process.

Stacked wafers with elevated features may also transfer structural damage to other associated wafers if improper materials are selected with too soft or too stiff a compressibility factor.

Partial loading of a box changes the compressibility requirements of the system so that simply adding more cushions may not be the most appropriate solution.

These contaminates may lead to corrosive damage and / or transistor inversion.

AMCs are exceptionally small in size they are generally corrosive and they carry a charge.

Through molecular migration, a charge build may occur over an active transistor node resulting in transistor inversion and a parametric failure.

There will be no clear path leading back to the transport media system as a source of the problem.

The impact, depending on the weight of the wafer and the amount of trapped air, will result in some amount of uneven force as the two surfaces come in contact with each other.

The allowed lateral movement during the insertion will result in scratch damage.

Nor is it understood if this sub-micron crazing can later become a point of entry for corrosive growth.

It is known that such damage has been witnessed at the bevel edges of the wafers.

Scratch Damage: Smeared or Scratched Circuit Lead Scratches

During transport, lateral movement of wafers within containers / boxes will scratch wafer surfaces during shipment.

The resulting scratches will cause damage to interconnect circuitry including smashing and disfiguring elevated connecting members such as ground rings, ball bond pads, and caps.

The same lateral movement will also create shaving from the protective separators which further promotes scratch damage.

Corrosive damage to wafer surfaces is generally caused by packaging materials such as containers, bags, cushions and separators that out-gas or chemically deplete excessive Airborne Molecular Contaminants or AMCs.

Therefore, moisture barrier bags having a high Moisture Vapor Transmission Rate or MVTR when combined with excessive AMCs will create corrosive residues causing latent defects to wafer surfaces.

Assuming no cracks or crazing have occurred to the passivation, the charge build that gathers above the transistor node may result in the transistor inverting, leading to a parametric circuit failure.

Generally these AMCs have already attached themselves to the oxide so that saw and grind slurry and their respective cleanups accomplish little to achieve removal.

For wafers packaged within shipping containers, there are instances where bond pads and adjacent passivation coatings will accumulate contamination that appears as a stain.

Clean rooms are teeming with AMCs that cannot be effectively removed by HEPA filters.

A small amount of chemical reaction takes place with the exposed aluminum or copper surface, thereby resulting in a corrosive stain in the area of bond pads as well as in any area where a mismatch between the photo-resist and the PO coating occurs.

Surfaces of bond pads that become excessively corroded while in transit from one location to another may become unnecessarily exposed to the condition of AMCs.

This damage is normally restricted to bond pad surfaces only and normally is associated with the presence of moisture vapors.

This out-gassing may be linked to inorganic and organic type AMCs resulting in the corrosive damage.

Poor selection of packaging materials such as open cell foam cushions and / or wafer separators treated with chemical additives that out-gas AMCs when combined with moisture vapors can cause bond pads to become contaminated.

Present-day packaging technology can cause wafers to be damaged by cushion over-packaging and / or under-packaging.

Wafer damage due to over-packaging is identified as resulting from stress-energy and will result in breakage usually during the packing process as the wafer box lid is attached or if the container is mishandled after closure.

Wafers damaged due to under-packaging can be caused by shock-energy if the container receives a sudden impact.

Both of these type failures may also be impacted by the size and thickness of the wafer and the resulting ability to withstand these kinds of forces.

HEPA filtration like that used in most front ends does not remove AMCs from the environment.

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