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Semiconductor device and method for manufacturing

A technology of semiconductors and field effect transistors, applied in the field of semiconductor devices and their manufacturing, can solve problems such as difficulty in forming high-performance transistors

Active Publication Date: 2010-07-21
SONY CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0018] The present invention will solve the problem that it is difficult to form a high-performance transistor when a MOS transistor is formed by a damascene process

Method used

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  • Semiconductor device and method for manufacturing
  • Semiconductor device and method for manufacturing
  • Semiconductor device and method for manufacturing

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0070] attached figure 1 is a schematic cross-sectional view showing the semiconductor device according to the first embodiment.

[0071] For example, an element isolation insulating film 11 for isolating an active region is formed by an STI (Shallow Trench Isolation) method on a silicon semiconductor substrate 10 having a channel formation region. Further, an insulating film I including an offset spacer 15 , a silicon nitride film (sidewall spacer) 17 a and an interlayer insulating film 20 is formed on the semiconductor substrate 10 .

[0072] For example, a gate electrode trench A is formed in the insulating film 1, and a gate insulating film 21 including a hafnium oxide film or an aluminum oxide film having a higher dielectric constant than silicon oxide is formed at the bottom of the gate electrode trench A. , that is, high-k film, or silicon oxide film. Furthermore, the gate electrode 22 is formed on the gate insulating film 21 by filling the gate electrode trench A wit...

no. 2 example

[0134] The semiconductor device according to the second embodiment of the present invention is basically the same as the first embodiment.

[0135] A method of manufacturing a semiconductor device according to this embodiment is described with reference to the drawings.

[0136] First, as attached Figure 7A As shown, an element isolation insulating film 11 is formed by an STI method for isolating an active region in a silicon semiconductor substrate 10 having a channel formation region. Next, silicon oxide is deposited to a thickness of about 4 nm on the entire surface by a thermal oxidation method. In addition, polysilicon and silicon nitride are deposited by the CVD method, and photolithographic etching is performed on the region other than the gate formation region to deposit the dummy gate insulating film 12, the dummy gate electrode 13 made of polysilicon, and the dummy gate electrode 13 made of silicon nitride. hard mask layer 14 .

[0137] Next, silicon nitride is d...

no. 3 example

[0152] Figure 9 is a cross-sectional view of the semiconductor device according to the third embodiment.

[0153] This embodiment is basically the same as the first embodiment except that each offset spacer 15 remains as a laminated layer of a silicon nitride film 15a and a silicon oxide film 15b. Other parts are the same as the first embodiment.

[0154] A method of manufacturing a semiconductor device according to this embodiment will be described with reference to the drawings.

[0155] First, if Figure 10A As described, the same steps as in the second embodiment are performed until the dummy gate electrode 13 (and hard mask layer 14 ) is removed.

[0156] Next, if Figure 10B Said, for example, the thickness of the silicon nitride film 15a constituting each offset spacer 15 is controlled to such a thickness that when the gate insulating film is removed by the same etching method or DHF treatment as in the first embodiment, 12, the silicon nitride film is not complet...

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PUM

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Abstract

The present invention discloses a semiconductor and a method for manufacturing the same. A semiconductor device having a field effect transistor comprises a semiconductor substrate having a channel-forming region, an insulating film formed on the semiconductor substrate, a gate electrode trench formed in the insulating film, a gate insulating film formed at the bottom of the gate electrode trench, a gate electrode formed by filling the gate electrode trench with a layer on the gate insulating film, offset spacers composed of silicon oxide or boron-containing silicon nitride and formed as a portion of the insulating film to constitute the sidewall of the gate electrode trench, sidewall spacers formed as a portion of the insulating film on both sides of the offset spacers on the side away from the gate electrode, and source-drain regions having an extension region and formed in the semiconductor substrate and below at least the offset spacers and the sidewall spacers.

Description

technical field [0001] The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly, a semiconductor device including a field effect transistor and a method of manufacturing the same. Background technique [0002] Among methods of manufacturing a semiconductor device, a damascene process is generally used as a method of forming wiring. [0003] In the damascene process, for example, a gate electrode groove is formed on an insulating film on a substrate, and a conductive material is deposited to fill the gate electrode groove, and then the conductive material outside the groove is removed by CMP (Chemical Mechanical Polishing). Material is removed, leaving conductive material within the trenches of the gate electrode to form wiring. [0004] A MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor; hereinafter referred to as "MOS transistor") is a basic element of a semiconductor device, and as the miniaturization of the...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/423H01L21/336H01L21/28H01L21/311
CPCH01L29/66545H01L29/6656H01L29/6659H01L29/7833
Inventor 菊池善明
Owner SONY CORP