Ceramic small outline package (CSOP) method

A small-profile packaging, ceramic technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of low reliability, poor air tightness of plastic-packaged integrated circuits, long distance, etc., to ensure bond strength performance, The effect of reducing chip contamination and ensuring reliability

A small-profile packaging, ceramic technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of low reliability, poor air tightness of plastic-packaged integrated circuits, long distance, etc., to ensure bond strength performance, The effect of reducing chip contamination and ensuring reliability

CN101740413AInactive Publication Date: 2010-06-16TIANSHUI 749 ELECTRONICS
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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0029] Preparation of special CSOP08L shell packaging circuit, tube base material selection: the base of the shell is made of more than 90% alumina ceramics, the lead frame is made of 4J29 or 4J34 iron-cobalt-nickel alloy, the surface gold plating layer is made of more than 99.7% electroplated gold, and only cobalt is used for hardening The gold plating process is carried out on the electroplating nickel layer or the chemical nickel plating layer, the thickness of the gold plating layer is ≥0.8μm, the coating of other parts is not less than 1.0μm, and the coating of the cover plate is ≥0.6μm, which has good temperature resistance, pressure resistance and low adsorption The material with water vapor capacity is the pipe base material;

[0030] The overall dimensions of the tube base of the CSOP08L packaged integrated circuit, in mm:

[0031] Tube shell length: 5.00±0.18;

[0032] Tube shell width: 4.40±0.18;

[0033] Tube shell thickness: 1.55±0.05;

[0034] Pin spacing: 1.2...

Embodiment 2

[0074] Embodiment 2: Special-purpose CSOP14L shell encapsulation circuit

[0075] to clean

[0076] Tube base material selection: the shell base is made of more than 90% alumina ceramics, the lead frame is made of 4J29 or 4J34 iron-cobalt-nickel alloy, the surface gold plating layer is made of more than 99.7% electroplated gold, and only cobalt is used as the hardener. On the nickel layer or electroless nickel plating layer, the thickness of the gold plating layer is ≥ 0.8 μm, the coating of other parts is not less than 1.0 μm, and the coating of the cover plate is ≥ 0.6 μm. The material with good temperature resistance, pressure resistance and low water vapor absorption capacity is the tube base Material;

[0077] Overall dimensions of CSOP14L package integrated circuit, in mm:

[0078] Tube shell length: 9.00±0.20;

[0079] Tube shell width: 6.00±0.20;

[0080] Tube shell thickness: 2.80±0.31;

[0081] Pin spacing: 1.27±0.05;

[0082] The cavity size of the adhesive ar...

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Abstract

The invention discloses a ceramic small outline package (CSOP) method which comprises a cleaning process, a die bonding process, a bonding process, a before-package baking process, a package process and a printing process. An integrated circuit packaged by adopting the CSOP method has excellent electrical property and thermal property, small volume and light weight. The invention is widely applied to fields of aviation, astrogate and the like. When in application, solder paste is printed on a printed circuit board (PCB) welding pad, and the electrical connection is realized by sintering welding points through reflow welding.

Description

technical field [0001] The invention belongs to a package manufacturing method in the field of integrated circuits, in particular to a CSOP ceramic small-outline package method. Background technique [0002] At present, the SOP small outline package produced by the general process is the most popular surface mount package, and the center distance of the pins is 1.27mm. The vast majority of packages are now plastic-encapsulated integrated circuits, and the minimum size of ceramic-encapsulated integrated circuits is generally 6.0mm×6.0mm, and the thickness of the package is more than 2.5mm, which cannot meet the mutual compatibility with plastic-encapsulated integrated circuits. However, existing ceramic package integrated circuits have high radians, long distances, low density, high thickness, and large volume; plastic packaged integrated circuits have poor airtightness, low reliability, and ceramic packaged integrated circuits and plastic packaged integrated circuits cannot ...

Claims

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Application Information

Patent Timeline
16 Jun 2010
Publication
CN101740413A
IPC
H01L21/50; H01L21/60
Inventors
辛伟德; 蒲彦武