Embedded dynamic random access memory (eDRAM) cell -gain cell eDRAM cell with metal oxide semiconductor (MOS) capacitors and preparation method of gain cell eDRAM cells
A MOS process and MOS transistor technology, applied in the field of memory and preparation, embedded dynamic random access memory, gain unit eDRAM unit, can solve the problems of high refresh frequency and short data retention time, so as to reduce refresh frequency and improve data retention time , The effect of low preparation cost
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[0040] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings.
[0041] image 3 Shown is a schematic diagram of the circuit structure of the gain unit eDRAM unit according to the first embodiment of the present invention. Such as image 3 As shown, the gain unit eDRAM unit 400 includes a write MOS transistor 401, a read MOS transistor 402, an equivalent parasitic capacitance 404, a MOS capacitance 405, a write word line (Write Word Line, WWL) 406, a write bit line (Write Bit Line, WBL ) 407 , a read word line (Read Word Line, RWL) 408 , and a read bit line (Read Bit Line, RBL) 409 . Wherein, the gate of the write MOS transistor 401 is connected to WWL, so that the write MOS transistor 401 is controlled by WWL; the source (or drain) of the MOS transistor 401 is connected to WBL, and the drain (or source) of the MOS transistor...
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